| commit | efa1f7f367415bf954168d579d59ba339f597e25 | [log] [tgz] |
|---|---|---|
| author | Sanjay Patel <spatel@rotateright.com> | Wed Jun 22 19:20:59 2016 +0000 |
| committer | Sanjay Patel <spatel@rotateright.com> | Wed Jun 22 19:20:59 2016 +0000 |
| tree | f8bb72ba018ac0736750a5d7e0ba0af5bbb8e8d0 | |
| parent | 577fa41d5096d2da3c97722bc1ffddb10b9a1e70 [diff] |
[ValueTracking] improve ComputeNumSignBits for vector constants This is similar to the computeKnownBits improvement in rL268479. There's probably more we can do for vector logic instructions, but this should let us see non-splat constant masking ops that can become vector selects instead of and/andn/or sequences. Differential Revision: http://reviews.llvm.org/D21610 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273459 91177308-0d34-0410-b5e6-96231b3b80d8