| commit | 499f980e9e5e2b84f9d7947d0b8ddfb7ed4ab9f4 | [log] [tgz] |
|---|---|---|
| author | Alex Bradbury <asb@lowrisc.org> | Thu Dec 07 12:45:05 2017 +0000 |
| committer | Alex Bradbury <asb@lowrisc.org> | Thu Dec 07 12:45:05 2017 +0000 |
| tree | 394ea32f65415c1e42c771eac7818ad603b18c2e | |
| parent | 846e43e49046c172d883ab05e1fe4b5fa098ad91 [diff] |
[RISCV][NFC] Use TargetRegisterClass::hasSubClassEq in storeRegToStackSlot/loadReadFromStackSlot Simply checking for register class equality will break once additional register classes are added (as is done for the RVC instruction set extension). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320036 91177308-0d34-0410-b5e6-96231b3b80d8