| commit | c442198d91fbd2313de0f0851fe94024084efd1f | [log] [tgz] |
|---|---|---|
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Oct 01 16:31:30 2018 +0000 |
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Oct 01 16:31:30 2018 +0000 |
| tree | ea8a295027709efbd1abab070b140a2322e85b12 | |
| parent | c2625345a6c63eaadcf3ee4b85c6b14afa68983e [diff] |
[X86][Btver2] Fix BT(C|R|S)mr & BT(C|R|S)mi schedule latency + uop counts Match AMD Fam16h SOG + llvm-exegesis tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343494 91177308-0d34-0410-b5e6-96231b3b80d8