| commit | 0eea35a6ef01f5bf57769da166833674d43a9722 | [log] [tgz] |
|---|---|---|
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Feb 26 22:10:17 2018 +0000 |
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | Mon Feb 26 22:10:17 2018 +0000 |
| tree | c98771d34d9e7cb6b64dd20174c63ad471f7942c | |
| parent | 35b540858f9b41b527e0de08518b31d0f01907dd [diff] |
[X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280) Agner's tables indicate that for SSE42+ targets (Core2 and later) we can reduce the FADD/FSUB/FMUL costs down to 1, which should fix the Himeno benchmark. Note: the AVX512 FDIV costs look rather dodgy, but this isn't part of this patch. Differential Revision: https://reviews.llvm.org/D43733 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326133 91177308-0d34-0410-b5e6-96231b3b80d8