tree 60294ecd3670543e55b24aca1a4507c391649203
parent eef8b8c35c585d941fb14c66df3cebc46b33f776
author Tom Stellard <thomas.stellard@amd.com> 1384385797 +0000
committer Tom Stellard <thomas.stellard@amd.com> 1384385797 +0000

R600/SI: Prefer SALU instructions for bit shift operations

All shift operations will be selected as SALU instructions and then
if necessary lowered to VALU instructions in the SIFixSGPRCopies pass.

This allows us to do more operations on the SALU which will improve
performance and is also required for implementing private memory
using indirect addressing, since the private memory pointers must stay
in the scalar registers.

This patch includes some fixes from Matt Arsenault.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194625 91177308-0d34-0410-b5e6-96231b3b80d8