| commit | fb717b4b98a895bbdabb2454e624cd5837e45c20 | [log] [tgz] |
|---|---|---|
| author | Changpeng Fang <changpeng.fang@gmail.com> | Wed Aug 24 20:35:23 2016 +0000 |
| committer | Changpeng Fang <changpeng.fang@gmail.com> | Wed Aug 24 20:35:23 2016 +0000 |
| tree | ccbf2f25536f3071e750a6f493fd3450ea4528ba | |
| parent | bde752e10f1536a10392e82aa0a24032f3c19923 [diff] |
AMDGCN/SI: Implement readlane/readfirstlane intrinsics Summary: This patch implements readlane/readfirstlane intrinsics. TODO: need to define a new register class to consider the case that the source could be a vector register or M0. Reviewed by: arsenm and tstellarAMD Differential Revision: http://reviews.llvm.org/D22489 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279660 91177308-0d34-0410-b5e6-96231b3b80d8