| commit | 3a0fccf6a0a1702506b2bf6da1e588b2aadec32c | [log] [tgz] |
|---|---|---|
| author | Quentin Colombet <qcolombet@apple.com> | Thu Apr 30 22:27:20 2015 +0000 |
| committer | Quentin Colombet <qcolombet@apple.com> | Thu Apr 30 22:27:20 2015 +0000 |
| tree | 48ea90ce8770896cbaf92fe786a2bd0d1091367c | |
| parent | d47066e86b47c40c3c5ba93e211865df68e49a67 [diff] |
[AArch64] Fix bad register class constraint in fast-isel for TST instruction. rdar://problem/20748715 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236273 91177308-0d34-0410-b5e6-96231b3b80d8