tree 4e872baa65afc3129b75829d07b0a7033a458148
parent 4746ebdd8b3723b96d0ea72ad04e5091ea1d2f55
author Sam Parker <sam.parker@arm.com> 1509619390 +0000
committer Sam Parker <sam.parker@arm.com> 1509619390 +0000

[ARM] and, or, xor and add with shl combine

The generic dag combiner will fold:

(shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
(shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)

This can create constants which are too large to use as an immediate.
Many ALU operations are also able of performing the shl, so we can
unfold the transformation to prevent a mov imm instruction from being
generated.

Other patterns, such as b + ((a << 1) | 510), can also be simplified
in the same manner.

Differential Revision: https://reviews.llvm.org/D38084


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317197 91177308-0d34-0410-b5e6-96231b3b80d8