| commit | 95fa1db8f537f1c1f574f392df4cc553fbf288db | [log] [tgz] |
|---|---|---|
| author | Kai Nacke <kai.nacke@redstar.de> | Thu May 28 16:23:16 2015 +0000 |
| committer | Kai Nacke <kai.nacke@redstar.de> | Thu May 28 16:23:16 2015 +0000 |
| tree | fde63c923fe2bc56177e2bcd94a7fb864813566a | |
| parent | 5d25204af9871a93c082e519e650bd83e5120542 [diff] |
[mips] Add new format for dmtc2/dmfc2 for Octeon CPUs. Octeon CPUs use dmtc2 rt,imm16 and dmfcp2 rt,imm16 for the crypto coprocessor. E.g. dmtc2 rt,0x4057 starts calculation of sha-1. I had to introduce a new deconding namespace to avoid a decoding conflict. Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D10083 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238439 91177308-0d34-0410-b5e6-96231b3b80d8