commit | 0800ef15138f457db48d0f39c338ed94061158bf | [log] [tgz] |
---|---|---|
author | Sanjay Patel <spatel@rotateright.com> | Sun Oct 23 23:13:31 2016 +0000 |
committer | Sanjay Patel <spatel@rotateright.com> | Sun Oct 23 23:13:31 2016 +0000 |
tree | 16a2b8bce8ba5d1c1f3f53816af634ab53c38db0 | |
parent | 09116d9d187636f555f09a41523b8620433c0892 [diff] |
[DAG] enhance computeKnownBits to handle SRL/SRA with vector splat constant git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284953 91177308-0d34-0410-b5e6-96231b3b80d8