| commit | c479e3d3f296a53d9053488ba89eab123fe5e7be | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Mon Mar 19 04:21:40 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Mon Mar 19 04:21:40 2018 +0000 |
| tree | 7e16f948559afac9fba76a731c658334e7e4af5b | |
| parent | f5ae8467a0a225ac58609b09a8962fd2b314cd3e [diff] |
[X86] Add ADD16i16/ADD32i32/ADD64i32 and similar to the scheduler models to match ADD8i8. Also move ADC8i8 and SBB8i8 in the Sandy Bridge model to the same class as ADC8ri and SBB8ri. That seems more accurate since its the 8i8 is just the register forced to AL instead of coming from modrm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327820 91177308-0d34-0410-b5e6-96231b3b80d8