[X86] Don't reorder (srl (and X, C1), C2) if (and X, C1) can be matched as a movzx

Summary:
If we can match as a zero extend there's no need to flip the order to get an encoding benefit. As movzx is 3 bytes with independent source/dest registers. The shortest 'and' we could make is also 3 bytes unless we get lucky in the register allocator and its on AL/AX/EAX which have a 2 byte encoding.

This patch was more impressive before r322957 went in. It removed some of the same Ands that got deleted by that patch.

Reviewers: spatel, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42313

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323175 91177308-0d34-0410-b5e6-96231b3b80d8
4 files changed