tree beab0fa4843cb421ab5e8128204e17949903b416
parent 7268ea5189e6b212075d6cc7376ef409f367463b
author Craig Topper <craig.topper@gmail.com> 1467172007 +0000
committer Craig Topper <craig.topper@gmail.com> 1467172007 +0000

[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition.

If a operation for a recurrence is an addition with no signed wrap and both input sign bits are 0, then the result sign bit must also be 0. Similar for the negative case.

I found this deficiency while playing around with a loop in the x86 backend that contained a signed division that could be optimized into an unsigned division if we could prove both inputs were positive. One of them being the loop induction variable. With this patch we can perform the conversion for this case. One of the test cases here is a contrived variation of the loop I was looking at.

Differential revision: http://reviews.llvm.org/D21493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274098 91177308-0d34-0410-b5e6-96231b3b80d8