| commit | 529b26551c9dd0420eb19801464708de507c6133 | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Mon Jun 25 16:17:48 2018 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Mon Jun 25 16:17:48 2018 +0000 |
| tree | c4d91c56c4f477c06b13215334b8379075c159ad | |
| parent | a26c784064a6e32b1873f5f25a1ea7bb99e4287b [diff] |
AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr Note a normal select test is not currently possible because this relies on input registers tracked in SIMachineFunctionInfo which are not currently serializable in MIR, but this does work end-to-end from the IR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335490 91177308-0d34-0410-b5e6-96231b3b80d8