commit 96102045c0f3090e8ce16bb1fc20cc0a50c236ca
author Sjoerd Meijer <sjoerd.meijer@arm.com> Tue Feb 06 08:43:56 2018 +0000
committer Sjoerd Meijer <sjoerd.meijer@arm.com> Tue Feb 06 08:43:56 2018 +0000
tree 6705e9e693cc3e31c4a959c8163e3ea379fb132f
parent 74c3cb19aa1c1536f3691255a5e0d24c7eb358b5

[ARM] Armv8.2-A FP16 code generation (part 3/3)

This adds most of the FP16 codegen support, but these areas need further work:

- FP16 literals and immediates are not properly supported yet (e.g. literal
  pool needs work),
- Instructions that are generated from intrinsics (e.g. vabs) haven't been
  added.

This will be addressed in follow-up patches.

Differential Revision: https://reviews.llvm.org/D42849


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324321 91177308-0d34-0410-b5e6-96231b3b80d8