AArch64: allow vN to represent 64-bit registers in inline asm.

Unlike xN/wN, the size of vN is genuinely ambiguous in the assembly, so we
should try to infer what was intended from the type. But only down to 64-bits
(vN can never represent sN, hN or bN).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269132 91177308-0d34-0410-b5e6-96231b3b80d8
2 files changed