[ARM] Testcase for missed optimization with i16 compare.

The result looks weird because the DAG actually has an explicit
shift; I haven't figured out why, exactly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335000 91177308-0d34-0410-b5e6-96231b3b80d8
1 file changed