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review.blissroms.org / platform_external_llvm80 / 038197988bcd7619657633da7116c7292187d4ae
  1. 0381979 Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. by Craig Topper · 14 years ago
  2. 842f58f Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W. by Craig Topper · 14 years ago
  3. e4481d8 s/SequeuentiallyConsistent/SequentiallyConsistent/g by Nick Lewycky · 14 years ago
  4. 5366ca4 Fix verb tense agreement. by Nick Lewycky · 14 years ago
  5. fbad25e CR fixes per Bruno's request. by Nadav Rotem · 14 years ago
  6. cfeb55c Really un-XFAIL the testcase, like I said I would in r139458. by Eli Friedman · 14 years ago
  7. 106f6e7 r139454 activates an assert in a case where we were doing the right thing anyway. Make that explicit, and un-XFAIL the testcase. by Eli Friedman · 14 years ago
  8. 81cbb0a Fix the asserts in lib/Target/X86/X86ELFWriterInfo.cpp and by Richard Trieu · 14 years ago
  9. 2db8628 Fixed an assert from: by Richard Trieu · 14 years ago
  10. 20151da [disable-iv-rewrite] Allow WidenIV to handle NSW/NUW operations better. by Andrew Trick · 14 years ago
  11. 5433767 Set NSW/NUW flags on SCEVAddExpr when the operation is flagged as such. by Andrew Trick · 14 years ago
  12. 2e3734e Fix asserts in CodeGen from: by Richard Trieu · 14 years ago
  13. 1ad60c2 Thumb2 parsing and encoding for MOV(immediate). by Jim Grosbach · 14 years ago
  14. 33ff5ae Fix test cases. Generate code for Mips32r1 unless a Mips32r2 feature is tested. by Akira Hatanaka · 14 years ago
  15. 921d01a LDM writeback is not allowed if Rn is in the target register list. by Owen Anderson · 14 years ago
  16. 112fb73 Fix an ambiguously nested if. by Owen Anderson · 14 years ago
  17. cd4338f Fix buildbot breakage caused by r139415. I missed one instance of a manually create ARM::tB. by Owen Anderson · 14 years ago
  18. 08fef88 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. by Owen Anderson · 14 years ago
  19. 46ac94b O64 will not be supported. by Akira Hatanaka · 14 years ago
  20. 5881586 Make F31 and D15 non-reserved registers. by Akira Hatanaka · 14 years ago
  21. c3ab388 tidy up a bit by Chris Lattner · 14 years ago
  22. 51f6a7a Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. by Owen Anderson · 14 years ago
  23. 13d8baa Update Clang AST attribute reader tblgen generation to match with ASTReader change by Douglas Gregor · 14 years ago
  24. 9a439af Mips32 does not reserve even-numbered floating point registers. by Akira Hatanaka · 14 years ago
  25. 9db817f Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897. by Eli Friedman · 14 years ago
  26. 8ddf653 Drop support for Mips1 and Mips2. by Akira Hatanaka · 14 years ago
  27. 8ffad56 Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type by Nadav Rotem · 14 years ago
  28. 468709e Thumb2 assembly parsing and encoding for MLA and MLS. by Jim Grosbach · 14 years ago
  29. a50c6d9 Don't tack "Instruction not interpretable yet!" onto the end of the instruction. by Duncan Sands · 14 years ago
  30. 84d043a Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2. by Jim Grosbach · 14 years ago
  31. 1e0fff1 Tidy up formatting a bit. by Jim Grosbach · 14 years ago
  32. 9510226 Thumb2 assembly parsing and encoding for LSL. by Jim Grosbach · 14 years ago
  33. d4b72de Thumb2 assembly parsing and encoding for LDRT. by Jim Grosbach · 14 years ago
  34. 56806c2 Thumb2 assembly parsing and encoding for LDRSHT. by Jim Grosbach · 14 years ago
  35. a315a99 Thumb2 assembly parsing and encoding for LDRSH. by Jim Grosbach · 14 years ago
  36. 578edfb Thumb2 assembly parsing and encoding for LDRSBT. by Jim Grosbach · 14 years ago
  37. 0811fe1 Thumb2 assembly parsing and encoding for LDRSB. by Jim Grosbach · 14 years ago
  38. 95d397c3 Thumb2 assembly parsing and encoding for LDRH. by Jim Grosbach · 14 years ago
  39. 1efd9a0 Shuffle a bit. by Jim Grosbach · 14 years ago
  40. d199d0c Drop support for Allegrex. Allegrex implements a variant of Mips2. by Akira Hatanaka · 14 years ago
  41. b6aed50 Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. by Jim Grosbach · 14 years ago
  42. 1ab7c8e Reapply r139247: Cache intermediate results during traceSiblingValue. by Jakob Stoklund Olesen · 14 years ago
  43. 39d7802 Comment formatting. by Andrew Trick · 14 years ago
  44. 9b4a2ac Update docs to reflect recent addition of new CompileUnit elements. by Devang Patel · 14 years ago
  45. e3a0adf Add FIXME. by Jim Grosbach · 14 years ago
  46. 73c8415 Mark the eh.typeid.for intrinsic as being 'const', which it is inside by Duncan Sands · 14 years ago
  47. d3be6ec Add disassembler test for Intel syntax. Tests r139353. by Craig Topper · 14 years ago
  48. ccfa4ed Fix handling of Intel syntax disassembling of movs and stos to stop being blank. Also fixed scas, and cmps to always print size suffix in Intel syntax since its abiguous without arguments. Fixes PR10875. by Craig Topper · 14 years ago
  49. ad5f0c9 Change default target architecture from Mips1 to Mips32r1 in preparation for by Akira Hatanaka · 14 years ago
  50. d40b0b0 Remove dead code. by Benjamin Kramer · 14 years ago
  51. 58856ea Fix release build: by Nick Lewycky · 14 years ago
  52. c170f5f gold plugin: report errors occured in lto_module_create_from_* by Ivan Krasin · 14 years ago
  53. 404507e 80 columns. by Akira Hatanaka · 14 years ago
  54. 9aee335 Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. by Devang Patel · 14 years ago
  55. 441462f All conditional branches are disallowed in IT blocks, not just CBZ/CBNZ. by Owen Anderson · 14 years ago
  56. d2fc31b Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. by Owen Anderson · 14 years ago
  57. d1e002a Formatting and typo. by Eric Christopher · 14 years ago
  58. ee64be9 Dix the 80-columns and remove unsupported v8i16 type from the list of legal vselect types. by Nadav Rotem · 14 years ago
  59. a77295d Thumb2 assembly parsing and encoding for LDRD(immediate). by Jim Grosbach · 14 years ago
  60. 7ec8fb8 Add a AVX version of a simple i64 -> f64 bitcast. This could be by Bruno Cardoso Lopes · 14 years ago
  61. 7cf79a8 Reapply testcase from r139309! by Bruno Cardoso Lopes · 14 years ago
  62. 64a17b3 Make sure to handle the case where emitPredicateMatch returns false. Noticed by inspection. by Eli Friedman · 14 years ago
  63. 5afc190 Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom by Kevin Enderby · 14 years ago
  64. 0fcab07 Add support for relocations to ObjectFile. by Benjamin Kramer · 14 years ago
  65. cbf479d * Combines Alignment, AuxInfo, and TB_NOT_REVERSABLE flag into a by Bruno Cardoso Lopes · 14 years ago
  66. caa60f1 Remove this crashing test, until I figure out what's going wrong here by Bruno Cardoso Lopes · 14 years ago
  67. 814c6ce Add AVX versions of blend vector operations and fix some issues noticed by Bruno Cardoso Lopes · 14 years ago
  68. 7db2d3a Fix PR10844: Add patterns to cover non foldable versions of X86vzmovl. by Bruno Cardoso Lopes · 14 years ago
  69. 5d97ee3 Added LateParsed property to TableGen attributes. by Caitlin Sadowski · 14 years ago
  70. 9ea33b0 Add tests for Thumb2 LDRB indexed addressing w/ writeback. by Jim Grosbach · 14 years ago
  71. 4b36e07 This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll by Nadav Rotem · 14 years ago
  72. cbdd2d1 add a testcase for the previous patch by Nadav Rotem · 14 years ago
  73. 0d76b19 Fix warning on windows; use of comparison with bool argument. by James Molloy · 14 years ago
  74. ffe3e7d Add X86-SSE4 codegen support for vector-select. by Nadav Rotem · 14 years ago
  75. 6d483c2 lto/addAsmGlobalSymbols: fast path when no module level asm is present. by Ivan Krasin · 14 years ago
  76. 603e103 lto/addAsmGlobalSymbols: fail fracefully when the target does not define AsmParser. by Ivan Krasin · 14 years ago
  77. 7809180 Adding myself to test my new commit powers. by David Blaikie · 14 years ago
  78. 22b4c81 Fix a use of freed string contents. by Andrew Trick · 14 years ago
  79. ed968a9 whitespace by Andrew Trick · 14 years ago
  80. 184166d A couple minor corrections to r139276. by Eli Friedman · 14 years ago
  81. 81ac8dd Fix the logic in BasicAliasAnalysis::aliasGEP for comparing GEP's with variable differences so that it actually does something sane. Fixes PR10881. by Eli Friedman · 14 years ago
  82. e64fb28 Thumb2 assembly parsing and encoding for LDR post-indexed. by Jim Grosbach · 14 years ago
  83. eeec025 Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. by Jim Grosbach · 14 years ago
  84. 170580e Remove the "common" set of instructions shared between ARM and Thumb2 modes. This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions. by Owen Anderson · 14 years ago
  85. f0eee6e Thumb2 assembly parsing and encoding for LDRBT. by Jim Grosbach · 14 years ago
  86. 489c693 Thumb2 assembly parsing and encoding for LDRB(register). by Jim Grosbach · 14 years ago
  87. ab899c1 Thumb2 assembly parsing and encoding for LDR(register). by Jim Grosbach · 14 years ago
  88. 3e328ec Add two notes for correlated-expression optimizations. by Benjamin Kramer · 14 years ago
  89. 0472e04 Revert r139247 "Cache intermediate results during traceSiblingValue." by Jakob Stoklund Olesen · 14 years ago
  90. 8bb5a86 Thumb2 assembly parsing and encoding for LDRB(immediate). by Jim Grosbach · 14 years ago
  91. 1aedfb4 Thumb2 assembly parsing and encoding for LDR(literal). by Jim Grosbach · 14 years ago
  92. 8a83f71 Create Thumb2 versions of STC/LDC, and reenable the relevant tests. by Owen Anderson · 14 years ago
  93. ed1cb6d Add tests for Thumb2 LDR(immediate) from r139254. by Jim Grosbach · 14 years ago
  94. a8307dd Thumb2 parsing and encoding for LDR(immediate). by Jim Grosbach · 14 years ago
  95. 94f914e Thumb2 parsing and encoding for LDMDB. by Jim Grosbach · 14 years ago
  96. a5d5856 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. by James Molloy · 14 years ago
  97. 2c207a0 Cache intermediate results during traceSiblingValue. by Jakob Stoklund Olesen · 14 years ago
  98. d5ccb05 Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()). by Eli Friedman · 14 years ago
  99. 9050288 Update test for 139243 by Jim Grosbach · 14 years ago
  100. cfbb3a7 Thumb2 ldm/stm 'db' mnemonics don't have a '.w' suffix. by Jim Grosbach · 14 years ago