- 076b15b [utils] Cope with the binary having a .exe extension in update_mca_test_checks.py by Greg Bedwell · 7 years ago
- 340f0f6 [utils] Stricter checking from update_mca_test_checks.py by Greg Bedwell · 7 years ago
- 29869b9 [utils] Allow better identification of matching blocks in update_mca_test_checks.py by Greg Bedwell · 7 years ago
- 56f7ea2 [LLVM-C] Add more debug information accessors to GlobalObject and Instruction by Robert Widmann · 7 years ago
- 331a5ec [InstCombine] don't propagate wider shufflevector arguments to predecessors by Sanjay Patel · 7 years ago
- 5c80632 [InstCombine] adjust shuffle undef propagation tests; NFC by Sanjay Patel · 7 years ago
- 033636c [ORC] Remove some dead code. by Lang Hames · 7 years ago
- 168e4a5 [ORC] Fix the unit tests that were broken by r343323. by Lang Hames · 7 years ago
- 88ba134 [GISel]: Remove an incorrect assert in CallLowering by Aditya Nandakumar · 7 years ago
- a6f5223 [ORC] Improve debugging output for ORC. by Lang Hames · 7 years ago
- 9a43bbc [X86][Btver2] PSUBS/PSUBUS instructions are zero-idioms by Simon Pilgrim · 7 years ago
- 13e2d88 [X86][Btver2] Add zero-idiom tests for PSUBS/PSUBUS instructions by Simon Pilgrim · 7 years ago
- 96f82d5 Reapply changes reverted by r343235 by Luke Cheeseman · 7 years ago
- 600c3e6 Fix and modernize StringMatcher comment; NFC by Sven van Haastregt · 7 years ago
- 46304bd [MIPS GlobalISel] Lower i64 arguments by Petar Jovanovic · 7 years ago
- 72cdd51 [X86][Btver2] CVTSS2I/CVTSD2I - add missing JFPU0 pipe by Simon Pilgrim · 7 years ago
- edfa885 Split invocations in CodeGen/X86/cpus.ll among multiple tests. (NFC) by Jonas Devlieghere · 7 years ago
- 965ed08 [llvm-mca] Remove redundant namespace prefixes. NFC by Andrea Di Biagio · 7 years ago
- ab5d6ab [X86][Btver2] Fix BSF/BSR schedule by Simon Pilgrim · 7 years ago
- deede4f Revert r343308: [LoopInterchange] Turn into a loop pass. by Florian Hahn · 7 years ago
- 945a3e0 [LoopInterchange] Turn into a loop pass. by Florian Hahn · 7 years ago
- 9abf993 [llvm-mca] Teach how to track zero registers in class RegisterFile. by Andrea Di Biagio · 7 years ago
- 274ec57 [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k by Peter Smith · 7 years ago
- c2c1024 [ARM] Allow execute only code on Cortex-m23 by David Spickett · 7 years ago
- b785fa5 Remove extra whitespace. NFC. (test commit) by David Spickett · 7 years ago
- f254684 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB by Oliver Stannard · 7 years ago
- 1076f42 [X86][BtVer2] Fix PHMINPOS schedule resources typo by Simon Pilgrim · 7 years ago
- ea3df5e [CodeGen] fix broken successor probability in MBB dump by Hiroshi Inoue · 7 years ago
- 5cdff6b Test commit. NFC. by Owen Rodley · 7 years ago
- 6752904 [ScalarizeMaskedMemIntrin] Use MinAlign to calculate alignment for the scalar load/stores to handle element types that are byte-sized but not powers of 2. by Craig Topper · 7 years ago
- 384d350 [pdb] Simplify the code by replacing a few string conversions with calls to invokeBstrMethod() by Aaron Smith · 7 years ago
- 70ae543 merge-request.sh: Add 7.0 metabug by Tom Stellard · 7 years ago
- 217504b [ORC] clang-format the ThreadSafeModule code. by Lang Hames · 7 years ago
- 7ea842c [ORC] Add a const version of ThreadSafeModule::getModule(). by Lang Hames · 7 years ago
- 2c78ea3 [ORC] Lock ThreadSafeContext during module destruction in ThreadSafeModule's by Lang Hames · 7 years ago
- bcbf6bc [ScalarizeMaskedMemIntrin] Fix the alignment calculation for the scalar stores of a masked store expansion. by Craig Topper · 7 years ago
- dee8e53 [ScalarizeMaskedMemIntrin] Add test cases for masked store expansion. Increase alignment of one of the masked load test cases. by Craig Topper · 7 years ago
- 1b2b5a5 [X86] Add the test case from PR38986. by Craig Topper · 7 years ago
- f947b53 [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of ConstantInts before generating the expansion without control flow. by Craig Topper · 7 years ago
- 5c98f23 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast checked by an assert. Consistently make use of the element type variable we already have. NFCI by Craig Topper · 7 years ago
- 8f75350 WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] by Derek Schuff · 7 years ago
- 2122d18 [ScalarizeMaskedMemIntrin] When expanding masked gathers, start with the passthru vector and insert the new load results into it. by Craig Topper · 7 years ago
- c670432 [ScalarizeMaskedMemIntrin] Add some IR only test cases for masked gather expansion. by Craig Topper · 7 years ago
- 4f95400 [ScalarizeMaskedMemIntrin] When expanding masked loads, start with the passthru value and insert each conditional load result over their element. by Craig Topper · 7 years ago
- 4b75b6e [ScalarizeMaskedMemIntrin] Handle the case where the mask is an all zero vector. by Craig Topper · 7 years ago
- fe9a6b9 [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for masked load expansion so I can begin making modifications. by Craig Topper · 7 years ago
- 1a8d325 [ScalarizeMaskedMemIntrin] Remove some temporary variables that are only used by a single if condition. by Craig Topper · 7 years ago
- 3844ee8 [ScalarizeMaskedMemIntrin] Cleanup comments. NFC by Craig Topper · 7 years ago
- 1d6ef08 [ORC] Add definition for IRLayer::setCloneToNewContextOnEmit, use it to set the by Lang Hames · 7 years ago
- 1f7247b AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 by Konstantin Zhuravlyov · 7 years ago
- 5fb9129 [ORC] Make LocalIndirectStubsManager's operations thread-safe. by Lang Hames · 7 years ago
- 3a5e132 [ORC] Lock ThreadSafeContext during Module destructing in ThreadSafeModule. by Lang Hames · 7 years ago
- 62258de AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa by Konstantin Zhuravlyov · 7 years ago
- 4bcdd90 [ORC] Coalesce all of ORC's symbol renaming / linkage-promotion utilities into by Lang Hames · 7 years ago
- 73ff7f8 [ORC] LastKey needs to be protected to prevent data races. by Lang Hames · 7 years ago
- 3764510 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. by Lang Hames · 7 years ago
- 43980ea AMDGPU/NFC: Simplify VOP_MAC_F16/F32 by Konstantin Zhuravlyov · 7 years ago
- 45657b2 [AMDGPU] Fold copy (copy vgpr) by Stanislav Mekhanoshin · 7 years ago
- b41c4e1 [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' to check mask values. That's just %x so use that directly. by Craig Topper · 7 years ago
- 3b71991 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides by Simon Pilgrim · 7 years ago
- b496008 [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 by Simon Pilgrim · 7 years ago
- 4d42c19 Revert r343192 as an ubsan build is currently failing by Luke Cheeseman · 7 years ago
- 8ecc654 [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 by Simon Pilgrim · 7 years ago
- 9520282 [X86] Split BT and BTC/BTR/BTS scheduler classes by Simon Pilgrim · 7 years ago
- 65e0fda [Sparc] EXPENSIVE_CHECKS now passes all machine verifier errors (PR27461) by Simon Pilgrim · 7 years ago
- be394f1 [AArch64] Refactor immediate details out of add/sub tblgen class (NFCI) by Oliver Stannard · 7 years ago
- 5e78aca [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB by Oliver Stannard · 7 years ago
- 94a9f57 [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) by Sanjay Patel · 7 years ago
- 51f78de [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not 1 (same as TZCNT) by Simon Pilgrim · 7 years ago
- 7756815 [WPD] Fix incorrect devirtualization after indirect call promotion by Teresa Johnson · 7 years ago
- 26f2dcf [AArch64][v8.5A] Add Branch Target Identification instructions by Oliver Stannard · 7 years ago
- fa611d4 [InstCombine] add tests for FP sign-bit cmp optimization with fdiv; NFC by Sanjay Patel · 7 years ago
- c3edf1b [AArch64][v8.5A] Add speculation restriction system registers by Oliver Stannard · 7 years ago
- aba0e1b [AArch64][v8.5A] Add Armv8.5-A random number instructions by Oliver Stannard · 7 years ago
- 80d9802 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction by Oliver Stannard · 7 years ago
- 8a1edcb The llvm-exegesis output file is a html file not a txt file. by Simon Pilgrim · 7 years ago
- 9322555 [AArch64][v8.5A] Add prediction invalidation instructions to AArch64 by Oliver Stannard · 7 years ago
- 13a8300 [ARM][v8.5A] Add speculation barrier to ARM & Thumb instruction sets by Oliver Stannard · 7 years ago
- ad5b1d7 [AArch64][v8.5A] Add speculation barrier to AArch64 instruction set by Oliver Stannard · 7 years ago
- 930ab34 [Sparc] Remove the support for builtin setjmp/longjmp by Daniel Cederman · 7 years ago
- f4e5116 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions by Oliver Stannard · 7 years ago
- 79b8d8e [llvm-exegesis] Fix PR39096. by Clement Courbet · 7 years ago
- 3895db1 [Sparc] Add unimp alias by Daniel Cederman · 7 years ago
- 589b3f8 [Sparc] Add support for the partial write PSR instruction by Daniel Cederman · 7 years ago
- df5d1bc [X86][Btver2] TZCNT instructions take 2uops not 1 by Simon Pilgrim · 7 years ago
- 1ffbf26 [PowerPC] [NFC] Refactor code for printing register operands by Nemanja Ivanovic · 7 years ago
- 4e35650 [X86][Btver2] Add uops counter for exegesis reports by Simon Pilgrim · 7 years ago
- a26da93 Reapply changes reverted in r343114, lldb patch to follow shortly by Luke Cheeseman · 7 years ago
- c335565 [InstCombine] Add new tests in preparation for a combine of icmp (mul nsw/nuw X, C2), C by Nicola Zaghen · 7 years ago
- 8056d40 Revert r342942 "[MachineCopyPropagation] Reimplement CopyTracker in terms of register units" by Hans Wennborg · 7 years ago
- 56a8ba1 [llvm-exegesis][NFC] moving code around. by Guillaume Chatelet · 7 years ago
- 493618b [AArch64][v8.5A] Add PSTATE manipulation instructions XAFlag and AXFlag by Oliver Stannard · 7 years ago
- acd4380 [mips] Add support MIPS r6 Debian triples by Simon Atanasyan · 7 years ago
- 9fda99d [llvm-exegesis] Remove unused headers and fix naming issues by Fangrui Song · 7 years ago
- 4b09ab1 [ORC] Use ExecutionSession's pre-constructed main JITDylib in LLJIT. by Lang Hames · 7 years ago
- a0148b8 [docs] Remove reference to makellvm which was removed in rL329041 by Fangrui Song · 7 years ago
- 3b35e17 llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...) by Fangrui Song · 7 years ago
- ed523f9 Re-reapply r343129 with more fixes. by Lang Hames · 7 years ago
- d177f9e Revert "Re-revert r343129." by Lang Hames · 7 years ago
- 2cb32ff [WebAssembly] Fix MRI.hasOneNonDBGUse assert in WebAssemblyRegStackify pass by Yury Delendik · 7 years ago