1. 3ac3c01 Remove redundant includes from lib/Target/*.cpp. by Michael Zolotukhin · 8 years ago
  2. 9f101fa Remove redundant includes from utils/TableGen. by Michael Zolotukhin · 8 years ago
  3. d770752 Remove redundant includes from tools. by Michael Zolotukhin · 8 years ago
  4. 16872e2 Remove redundant includes from unittests. by Michael Zolotukhin · 8 years ago
  5. e2c2606 Remove redundant includes from various places. by Michael Zolotukhin · 8 years ago
  6. d5c7271 Remove redundant includes from lib/Transforms. by Michael Zolotukhin · 8 years ago
  7. f394ee0 Remove redundant includes from lib/Support. by Michael Zolotukhin · 8 years ago
  8. d149b23 Remove redundant includes from lib/ProfileData. by Michael Zolotukhin · 8 years ago
  9. 3b31d05 Remove redundant includes from lib/Object. by Michael Zolotukhin · 8 years ago
  10. ac904a2 Remove redundant includes from lib/MC. by Michael Zolotukhin · 8 years ago
  11. 6d1cdcc Remove redundant includes from lib/LTO. by Michael Zolotukhin · 8 years ago
  12. be0db55 Remove redundant includes from lib/IR. by Michael Zolotukhin · 8 years ago
  13. cedd433 Remove redundant includes from lib/ExecutionEngine. by Michael Zolotukhin · 8 years ago
  14. 0698488 Remove redundant includes from lib/DebugInfo. by Michael Zolotukhin · 8 years ago
  15. 41b2567 Remove redundant includes from lib/CodeGen. by Michael Zolotukhin · 8 years ago
  16. 2f74167 Remove redundant includes from lib/Bitcode. by Michael Zolotukhin · 8 years ago
  17. 0e973bc Remove redundant includes from lib/Analysis. by Michael Zolotukhin · 8 years ago
  18. a85ea41 [cmake] Explicitly set VS 2017 compatibility by Shoaib Meenai · 8 years ago
  19. 80b1dd8 [cmake] Determine MSVC host triple correctly when cross-compiling by Shoaib Meenai · 8 years ago
  20. 74ccbce AMDGPU: Partially fix disassembly of MIMG instructions by Matt Arsenault · 8 years ago
  21. 7cc3dcf [JumpThreading] Preservation of DT and LVI across the pass by Brian M. Rzycki · 8 years ago
  22. 2bf4af8 [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load by Aditya Kumar · 8 years ago
  23. 2676450 Ignore metainstructions during the shrink wrap analysis by Adrian Prantl · 8 years ago
  24. 99c03705 [dsymutil][test] Fix failing test when no lipo binary available by Jonas Devlieghere · 8 years ago
  25. 83f6d00 [X86] Add JCC/JECXZ/JECXZ/JRCXZ/LOOP schedule tests by Simon Pilgrim · 8 years ago
  26. c1f4787 Regenerate test-shrink.ll test results. NFC by Amaury Sechet · 8 years ago
  27. 4cac1c4 [dsymutil] Re-enable threading by Jonas Devlieghere · 8 years ago
  28. 6149067 [X86] Add RET/RETF schedule tests by Simon Pilgrim · 8 years ago
  29. d797d31 [X86] Add POP/PUSH schedule tests by Simon Pilgrim · 8 years ago
  30. 0bcc2cd [Function] Remove trailing end-of-line whitespace. NFC. by Brian M. Rzycki · 8 years ago
  31. efb6506 Fix link failure on one build bot introduced by r320584. by Nemanja Ivanovic · 8 years ago
  32. e8e0a7c Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-checks-win. by Galina Kistanova · 8 years ago
  33. cd1040a [X86] Add PREFETCH schedule tests by Simon Pilgrim · 8 years ago
  34. 39485b9 [X86] Add XCHG schedule tests by Simon Pilgrim · 8 years ago
  35. 531cde9 [X86] Add MOVNTI schedule tests by Simon Pilgrim · 8 years ago
  36. 7b053da [PowerPC] MachineSSA pass to reduce the number of CR-logical operations by Nemanja Ivanovic · 8 years ago
  37. a9fb896 [X86] Add ENTER/LEAVE schedule tests by Simon Pilgrim · 8 years ago
  38. 4a0d45f [X86] Add IMUL schedule tests by Simon Pilgrim · 8 years ago
  39. 2057bb7 [X86] Add RDMSR/WRMSR, RDPMC + RDTSC/RDTSCP schedule tests by Simon Pilgrim · 8 years ago
  40. 1cb7e40 [X86] Add ARPL/BOUND schedule tests by Simon Pilgrim · 8 years ago
  41. a3d1d56 [RISCV] Define sfence.vma InstAliases to match the GNU RISC-V tools by Alex Bradbury · 8 years ago
  42. a3d1ab8 [FuzzMutate] Only generate loads and stores to the first class sized types by Igor Laevsky · 8 years ago
  43. 95edead [FuzzMutate] Avoid zero sized aggregates by Igor Laevsky · 8 years ago
  44. 033683a [FuzzMutate] Correctly split landingpad blocks by Igor Laevsky · 8 years ago
  45. 6dc08a0 [X86][SSE] MOVMSK only uses the sign bit from each vector element by Simon Pilgrim · 8 years ago
  46. d475c17 [RISCV] Implement floating point assembler pseudo instructions by Alex Bradbury · 8 years ago
  47. fcf12e0 Reintroduce r320049, r320014 and r319894. OpenGL issues should be fixed by now. by Igor Laevsky · 8 years ago
  48. bc4037e [DAG] Promote ADDCARRY / SUBCARRY by Roger Ferrer Ibanez · 8 years ago
  49. d347e97 [CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  50. 2b16863 [CodeGen] Print target index operands as target-index(target-specific) + 8 in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  51. c846909 [CodeGen] Print constant pool index operands as %const.0 + 8 in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  52. 061f5ff [mips] Provide additional DSP bitconvert patterns by Stefan Maksimovic · 8 years ago
  53. 1f8ac16 [Testing/Support] Make the HasValue matcher composable by Pavel Labath · 8 years ago
  54. 6d0dcae [RISCV][NFC] Update RISCVInstrInfoC.td to match usual instruction naming convention by Alex Bradbury · 8 years ago
  55. 786bced [RISCV][NFC] Put isSImm6 and simm6 td definition in correct sorted position by Alex Bradbury · 8 years ago
  56. 5774b87 [RISCV] MC layer support for the remaining RVC instructions by Alex Bradbury · 8 years ago
  57. 4258537 [X86][BMI]: Adding full coverage of MC encoding for the BMI isa set.<NFC> by Gadi Haber · 8 years ago
  58. 93b8ba0 [cmake] Fix host tools build in when LLVM_EXPERIMENTAL_TARGETS_TO_BUILD is set by Alex Bradbury · 8 years ago
  59. 407ce54 Revert "[CGP] Enable select in complex addr mode" by Serguei Katkov · 8 years ago
  60. 56d08f7 [Targets] Don't automatically include the scheduler class enum from *GenInstrInfo.inc with GET_INSTRINFO_ENUM. Make targets request is separately. by Craig Topper · 8 years ago
  61. 596e2d5 [CGP] Enable select in complex addr mode by Serguei Katkov · 8 years ago
  62. 69956ec [XRay][compiler-rt] Reduce XRay log spam by Dean Michael Berris · 8 years ago
  63. 88e328a [NFC] Refactor SafepointIRVerifier by Serguei Katkov · 8 years ago
  64. fb60042 [SLP] Vectorize jumbled memory loads. by Mohammad Shahid · 8 years ago
  65. bb04a0e [CallSiteSplitting] Refactor creating callsites. by Florian Hahn · 8 years ago
  66. fa621d2 Rename LiveIntervalAnalysis.h to LiveIntervals.h by Matthias Braun · 8 years ago
  67. f09cbb9 Remove unnecessary includes; NFC by Matthias Braun · 8 years ago
  68. 3220c51 [hwasan] Inline instrumentation & fixed shadow. by Evgeniy Stepanov · 8 years ago
  69. 87e8c32 reverting out -r320532 because a warning is breaking the lld build by Michael Trent · 8 years ago
  70. 2aa4a86 Updated llvm-objdump to display local relocations in Mach-O binaries by Michael Trent · 8 years ago
  71. 0dace14 [EarlyCSE] add tests for commuted min/max; NFC by Sanjay Patel · 8 years ago
  72. 6c7d448 [Hexagon] Relax some checks in testcases, NFC by Krzysztof Parzyszek · 8 years ago
  73. c8f8b67 [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  74. ac78b43 [Hexagon] Better detection of identity and undef masks in shuffles by Krzysztof Parzyszek · 8 years ago
  75. 206ac23 [Hexagon] Fix wrong order of operands for vmux by Krzysztof Parzyszek · 8 years ago
  76. 1feb97a Reassociate: add global reassociation algorithm by Fiona Glaser · 8 years ago
  77. 960dcea Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast." by Alexey Bataev · 8 years ago
  78. f51ad9b Reapply "[X86] Flag BroadWell scheduler model as complete" by Sanjoy Das · 8 years ago
  79. d5f2794 Split IndirectBr critical edges before PGO gen/use passes. by Hiroshi Yamauchi · 8 years ago
  80. 94a6c84 [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  81. feb0ef4 Revert "[X86] Flag BroadWell scheduler model as complete" by Sanjoy Das · 8 years ago
  82. c0977e0 [X86] Add a couple TODOs about missing coverage/features motivated by D40335 by Craig Topper · 8 years ago
  83. 28ea974 [X86] Cleanup type conversion of 64-bit load-store pairs. by Nirav Dave · 8 years ago
  84. 68f6731 Test commit. by Alexandre Ganea · 8 years ago
  85. 3b391fe [MachineOperand][MIR] Add isRenamable to MachineOperand. by Geoff Berry · 8 years ago
  86. 9cc4cf0 Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast." by Alexey Bataev · 8 years ago
  87. be064aa [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  88. 52966dc Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast." by Alexey Bataev · 8 years ago
  89. 253f4d7 [cmake] Support moving debuginfo-tests to llvm/projects by Don Hinton · 8 years ago
  90. 6c363ab [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  91. 2582193 [X86] Remove CompleteModel tags from CPU targets until we have better error checking (PR35636) by Simon Pilgrim · 8 years ago
  92. 2a45601 [RISCV][NFC] Formatting fix in RISCVInstrInfo.td by Alex Bradbury · 8 years ago
  93. 1af98f1 Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast." by Alexey Bataev · 8 years ago
  94. c8e03de [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  95. 95ffa0f [RISCV] Implement assembler pseudo instructions for RV32I and RV64I by Alex Bradbury · 8 years ago
  96. 8d76ea7 Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast." by Alexey Bataev · 8 years ago
  97. 15d22ce [RISCV] MC layer support for the instructions added in the privileged spec by Alex Bradbury · 8 years ago
  98. 50ead902 [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast. by Alexey Bataev · 8 years ago
  99. 2139df9 [X86] Recognize constant arrays with special values and replace loads from it with subtract and shift instructions, which then will be replaced by X86 BZHI machine instruction. by Ayman Musa · 8 years ago
  100. 513fd90 [InstComineLoadStoreAlloca] Optimize stores to GEP off null base by Anna Thomas · 8 years ago