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review.blissroms.org / platform_external_llvm80 / 482ad802f1b1885542ea8a30e144a228a1526912
  1. 482ad80 MC: Use accessors for access to MCAsmFixup. by Daniel Dunbar · 15 years ago
  2. c9adb8c MC: Change MCInst::dump_pretty to not include a trailing newline. by Daniel Dunbar · 15 years ago
  3. 1464c1d Kill unneeded SExt. by Benjamin Kramer · 15 years ago
  4. c2798a1 SRetReturnReg was set in LowerFormalArguments(). So only assert it here. by Zhongxing Xu · 15 years ago
  5. e614e39 MC: Eliminate MCFragment vtable, which was unnecessary. by Daniel Dunbar · 15 years ago
  6. 9f3b6a3 Coding style change (Adding 1 missing space.) by Shih-wei Liao · 15 years ago
  7. 45469f3 Adding the missing implementation for ARM::SBFX and ARM::UBFX. by Shih-wei Liao · 15 years ago
  8. 174e597 Temporarily revert r104655 as it's breaking the bots. by Eric Christopher · 15 years ago
  9. 54e13ec fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. by Jim Grosbach · 15 years ago
  10. b555609 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." by Jakob Stoklund Olesen · 15 years ago
  11. a4e4ffd Change push_all to a non-virtual function and implement it in the by Dan Gohman · 15 years ago
  12. 4f98945 Delete an unused function. by Dan Gohman · 15 years ago
  13. 5eabaa2 Trim #include. by Dan Gohman · 15 years ago
  14. be22683 Dale and Evan suggested putting the "check for setjmp" much earlier in the by Bill Wendling · 15 years ago
  15. 6a45d68 Replace the SubRegSet tablegen class with a less error-prone mechanism. by Jakob Stoklund Olesen · 15 years ago
  16. 6d37a29 Adding the missing implementation of Bitfield's "clear" and "insert". by Shih-wei Liao · 15 years ago
  17. 5170b71 To handle s* registers in emitVFPLoadStoreMultipleInstruction(). by Shih-wei Liao · 15 years ago
  18. 96ac515 Start adding mach-o tls reloc support. by Eric Christopher · 15 years ago
  19. 76f0ad7 Drop the SuperregHashTable. It is essentially the same as SubregHashTable. by Jakob Stoklund Olesen · 15 years ago
  20. c3f5f78 First cut at supporting .debug_loc section. by Devang Patel · 15 years ago
  21. 48aefe1 Properly promote operands when optimizing a single-character memcmp. by Benjamin Kramer · 15 years ago
  22. f10bc81 Constify function. by Bill Wendling · 15 years ago
  23. eddc114 Do one map lookup instead of two. by Dan Gohman · 15 years ago
  24. 5b71dce Fix a missing newline in debug output. by Dan Gohman · 15 years ago
  25. 04386ca Move the verbose asm output up a bit so it can be used in the special cases by Eric Christopher · 15 years ago
  26. 5edfbdc Okay, bear with me here... by Bill Wendling · 15 years ago
  27. 02b46bc Add support for initialized global data for darwin tls. Update comments by Eric Christopher · 15 years ago
  28. cf50a53 Changed the encoding of X86 floating point stack operations where both operands by Kevin Enderby · 15 years ago
  29. 854f30d Removing test; Chris thinks it's better to have the by Dale Johannesen · 15 years ago
  30. b539852 Separate unrelated cases that once shared a numeric value by Jakob Stoklund Olesen · 15 years ago
  31. 1fc8e75 Print symbolic SubRegIndex names on machine operands. by Jakob Stoklund Olesen · 15 years ago
  32. 4fda967 Remove NumberHack entirely. by Jakob Stoklund Olesen · 15 years ago
  33. 39e2dd7 MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. by Daniel Dunbar · 15 years ago
  34. 86234c3 Fix another variant of PR 7191. Also add a testcase by Dale Johannesen · 15 years ago
  35. 7937368 MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. by Daniel Dunbar · 15 years ago
  36. 04ac770 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required by Kevin Enderby · 15 years ago
  37. 61734eb Fix PR 7191. I have been unable to create a .ll file that fails, sorry. by Dale Johannesen · 15 years ago
  38. 7e2f5aa Make sure aeskeygenassist uses an unsigned immediate field. by Eric Christopher · 15 years ago
  39. 48d0c16 Ignore NumberHack and give each SubRegIndex instance a unique enum value instead. by Jakob Stoklund Olesen · 15 years ago
  40. c159fba Use enums instead of literals for SystemZ subregisters by Jakob Stoklund Olesen · 15 years ago
  41. 22c0e97 Use enums instead of literals for X86 subregisters. by Jakob Stoklund Olesen · 15 years ago
  42. f3c770a Add missing implementation to the materialization of VFP misc. instructions (vmrs, vmsr and vmov (immediate)) by Zonr Chang · 15 years ago
  43. f86399b Add support to MOVimm32 using movt/movw for ARM JIT by Zonr Chang · 15 years ago
  44. a85df80 Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated. by Bob Wilson · 15 years ago
  45. 4876bdb Fix up instruction classes for Thumb2 RSB instructions to be consistent with by Bob Wilson · 15 years ago
  46. ab3912e Clean up indentation. by Bob Wilson · 15 years ago
  47. b7a3170 Disable invalid coalescer assertion. by Jakob Stoklund Olesen · 15 years ago
  48. e00fa64 Use enums instead of literals in the ARM backend. by Jakob Stoklund Olesen · 15 years ago
  49. ef473bf Print out the name of the function during SSC. by Bill Wendling · 15 years ago
  50. 33276d9 Switch SubRegSet to using symbolic SubRegIndices by Jakob Stoklund Olesen · 15 years ago
  51. c21763f Allow Thumb2 MVN instructions to set condition codes. The immediate operand by Bob Wilson · 15 years ago
  52. ec5a0b3 diaggroup categories should take precedence over diag-specific groups. by Chris Lattner · 15 years ago
  53. f27462e Lose the dummies by Jakob Stoklund Olesen · 15 years ago
  54. 09bc029 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data by Jakob Stoklund Olesen · 15 years ago
  55. 3946043 Avoid adding duplicate function live-in's. by Evan Cheng · 15 years ago
  56. e350690 Fix an mmx movd encoding. by Dan Gohman · 15 years ago
  57. ca956dc MC/X86: Add aliases for CMOVcc variants. by Kevin Enderby · 15 years ago
  58. d303846 Clean up some extra whitespace. by Bob Wilson · 15 years ago
  59. bb7ecb2 Thumb2 RSBS instructions were being printed without the 'S' suffix. by Bob Wilson · 15 years ago
  60. 295cdf8 Do not emit line number entries for unknown debug values. by Devang Patel · 15 years ago
  61. c7cf10c LR is in GPR, not tGPR even in Thumb1 mode. by Evan Cheng · 15 years ago
  62. a113227 Add SubRegIndex defs to PowerPC. It looks like the CR subregister indices are by Jakob Stoklund Olesen · 15 years ago
  63. d6be874 Use SubRegIndex in SystemZ. by Jakob Stoklund Olesen · 15 years ago
  64. fff916a SubRegIndex'ize Mips by Jakob Stoklund Olesen · 15 years ago
  65. 59f7199 SubRegIndex'ize MSP430 by Jakob Stoklund Olesen · 15 years ago
  66. 7bb31e3 Fix a few places that depended on the numeric value of subreg indices. by Jakob Stoklund Olesen · 15 years ago
  67. 558661d Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums by Jakob Stoklund Olesen · 15 years ago
  68. 3458e9e Rename X86 subregister indices to something shorter. by Jakob Stoklund Olesen · 15 years ago
  69. 73ea7bf Add the SubRegIndex TableGen class. by Jakob Stoklund Olesen · 15 years ago
  70. 3816c25 Encode the Caml frametable by following what the comment says: the number of descriptors by Nicolas Geoffray · 15 years ago
  71. 4139630 Apply timeouts and memory limits in more places. In particular, when by Duncan Sands · 15 years ago
  72. 414c0c4 llvm-mc: Use EmitIntValue where possible, which makes the API calls from the AsmParser and CodeGen line up better. by Daniel Dunbar · 15 years ago
  73. 01777ff llvm-mc: Use AddBlankLine in asm parser. This makes transliteration match the input much more closely, and also makes the API calls from the AsmParser and CodeGen line up better. by Daniel Dunbar · 15 years ago
  74. fdb5a86 MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches. by Daniel Dunbar · 15 years ago
  75. 069e434 VDUP doesn't support vectors with 64-bit elements. by Bob Wilson · 15 years ago
  76. 62e4c67 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example: by Daniel Dunbar · 15 years ago
  77. 54ddf3d tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one. by Daniel Dunbar · 15 years ago
  78. 4c36197 MC/X86: Add alias for setz, setnz, jz, jnz. by Daniel Dunbar · 15 years ago
  79. 3422cf0 Trivial change to dump() function for SparseBitVector by John Mosby · 15 years ago
  80. 2457f2c Implement @llvm.returnaddress. rdar://8015977. by Evan Cheng · 15 years ago
  81. 5eb1951 Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. by Jim Grosbach · 15 years ago
  82. 1e6d3ac This test is darwin only. Make it so(tm). by Eric Christopher · 15 years ago
  83. be751cf Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by by Bob Wilson · 15 years ago
  84. 8116ca5 Add full bss data support for darwin tls variables. by Eric Christopher · 15 years ago
  85. 65eb482 Collect variable information during endFunction() instead of beginFunction(). by Devang Patel · 15 years ago
  86. 46099f1 Add a new section and accessor for TLS data. by Eric Christopher · 15 years ago
  87. 70fe664 Clean up extra whitespace. by Bob Wilson · 15 years ago
  88. e81d010 Make this LookAheadLimit, not the uninitialized LookAheadLeft. by Eric Christopher · 15 years ago
  89. c2685a9 add a note by Chris Lattner · 15 years ago
  90. 070c1ab Expand on comment. by Eric Christopher · 15 years ago
  91. 9d31d79 Added retl for 32-bit x86 and added retq for 64-bit x86. by Kevin Enderby · 15 years ago
  92. 0df4a80 Fix comment and whitespace. by Eric Christopher · 15 years ago
  93. 299f424 expand on the llvm ir bitcode dox. Patch by Peter Housel! by Chris Lattner · 15 years ago
  94. 835810b Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs. by Evan Cheng · 15 years ago
  95. 9b00685 Fix section attribute name. by Eric Christopher · 15 years ago
  96. 78f006a Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements by Bob Wilson · 15 years ago
  97. 1015ba7 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs by Evan Cheng · 15 years ago
  98. 18b2c9d Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction by Jakob Stoklund Olesen · 15 years ago
  99. 379fe83 Simplify by Devang Patel · 15 years ago
  100. acbf634 Previous commit message should refer to 104308. by Dale Johannesen · 15 years ago