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review.blissroms.org / platform_external_llvm80 / 5649e25ce86b9d89d228ae7c392413571b0f8c19
  1. 5649e25 Pass LiveQueryResult by value by Matthias Braun · 12 years ago
  2. 87a8605 Refactor LiveInterval: introduce new LiveRange class by Matthias Braun · 12 years ago
  3. 331de11 Rename LiveRange to LiveInterval::Segment by Matthias Braun · 12 years ago
  4. 4afb5f5 Rename parameter: defined regs are not incoming. by Matthias Braun · 12 years ago
  5. 4d91232 test commit by Sriram Murali · 12 years ago
  6. 828c9e7 Use getPointerSizeInBits() rather than 8 * getPointerSize() by Matt Arsenault · 12 years ago
  7. 89dedc1 Fix grammar / missing words by Matt Arsenault · 12 years ago
  8. b8e48a6 Debug Info: In DIBuilder, the context field of subprogram is updated to use by Manman Ren · 12 years ago
  9. 75a3ad4 Add comments to debug info testing case. by Manman Ren · 12 years ago
  10. 1cc41bf R600: Fix trunc i64 to i32 on SI by Matt Arsenault · 12 years ago
  11. a7d9a5d Provide msbuild integration for vs2013. by Hans Wennborg · 12 years ago
  12. 6a24c7d Fix msbuild integration install script. by Hans Wennborg · 12 years ago
  13. 47fbbc2 R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP* by Tom Stellard · 12 years ago
  14. 3986785 R600/SI: Use -verify-machineinstrs for most tests by Tom Stellard · 12 years ago
  15. 0f9eaaa R600/SI: Define a separate MIMG instruction for each possible output value type by Tom Stellard · 12 years ago
  16. 219e788 R600/SI: Mark the EXEC register as reserved by Tom Stellard · 12 years ago
  17. de28bda R600: Use StructurizeCFGPass for non SI targets by Tom Stellard · 12 years ago
  18. 6a5a667 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). by Hao Liu · 12 years ago
  19. 812ddcc Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)." by Rafael Espindola · 12 years ago
  20. d622bef Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). by Hao Liu · 12 years ago
  21. 8ccf2b3 ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline. by Benjamin Kramer · 12 years ago
  22. 58e3e10 Disable function padding to get this test to pass on atom. by Benjamin Kramer · 12 years ago
  23. acd79ce ARM: correct liveness flags during ARMLoadStoreOpt by Tim Northover · 12 years ago
  24. 15de63c Allow non-AVX form of pmovmskb to take a GR64 operand. by Craig Topper · 12 years ago
  25. 369cc50 Remove duplicate instructions. by Craig Topper · 12 years ago
  26. be5c1fd Fix so CRC32r64r8 isn't accidentally filtered from the disassembler tables. by Craig Topper · 12 years ago
  27. 25dafa3 [mips] Do not generate INS/EXT nodes if target does not have support for by Akira Hatanaka · 12 years ago
  28. 6bba6bb Revert "llvm-c: Make target initializer functions external functions in lib." by Rui Ueyama · 12 years ago
  29. b4d9c11 Debug Info: In DIBuilder, the context and type fields of template_type and by Manman Ren · 12 years ago
  30. 9360e64 llvm-c: Make target initializer functions external functions in lib. by Anders Waldenborg · 12 years ago
  31. 5e5d494 Debug Info: In DIBuilder, the context field of a forward decl is updated by Manman Ren · 12 years ago
  32. bf15f19 Add missing releases. by Bill Wendling · 12 years ago
  33. 3353c59 Flip the ownership of MCStreamer and MCTargetStreamer. by Benjamin Kramer · 12 years ago
  34. e040909 Fix a bug in Dead Argument Elimination. by Shuxin Yang · 12 years ago
  35. 1a525e8 Add a GlobalAlias::isValidLinkage to reduce code duplication. by Rafael Espindola · 12 years ago
  36. 3b73dea [Sparc] Disable tail call optimization for sparc64. by Venkatraman Govindaraju · 12 years ago
  37. 0568ba6 Test commit. Remove whitespace from otherwise empty lines. by Greg Bedwell · 12 years ago
  38. 50dc2ad AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics. by Elena Demikhovsky · 12 years ago
  39. d29bae8 AArch64: enable MISched by default. by Tim Northover · 12 years ago
  40. ccb06ae AArch64: migrate ADRP relaxation test to be llvm-mc only. by Tim Northover · 12 years ago
  41. 5747f94 More x86 disassembler filtering cleanup. by Craig Topper · 12 years ago
  42. 036c6e8 Add missing HasAVX512 predicate. by Andrew Trick · 12 years ago
  43. 10c7925 Remove some old filters from the x86 disassembler table builder. by Craig Topper · 12 years ago
  44. 0c73c42 Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and only one of them is needed by the assembler/disassembler. by Craig Topper · 12 years ago
  45. 28ffa8a Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v' by Craig Topper · 12 years ago
  46. 442b23a Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables. by Craig Topper · 12 years ago
  47. b96a393 Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size. by Craig Topper · 12 years ago
  48. c52566d Add a paragraph about MCTargetStreamer. by Rafael Espindola · 12 years ago
  49. 8bb2a23 llvm/test/LTO should run also on cygwin. by NAKAMURA Takumi · 12 years ago
  50. 456e5e5 Debug Info: In DIBuilder, the context field of a DICompositeType is updated by Manman Ren · 12 years ago
  51. b6f74f0 Debug Info: In DIBuilder, the context fields of a static member and a by Manman Ren · 12 years ago
  52. c1e2b25 Debug Info: In DIBuilder, the derived-from field of DICompositeType by Manman Ren · 12 years ago
  53. 78c2f9b Debug Info: In DIBuilder, the derived-from field of DIDerivedType by Manman Ren · 12 years ago
  54. c976500 [AArch64] Add support for NEON scalar floating-point reciprocal estimate, by Chad Rosier · 12 years ago
  55. 25180dc Fix duplicated assertions. by Matt Arsenault · 12 years ago
  56. 3dfe644 [AArch64] Add support for NEON scalar signed/unsigned integer to floating-point by Chad Rosier · 12 years ago
  57. 73f615b Explicitly request unsigned enum types when desired by Reid Kleckner · 12 years ago
  58. 8758579 Debug Info: update testing to reflect r192018. by Manman Ren · 12 years ago
  59. 78f8339 Add fabsf to the list of inlined functions; otherwise by Reed Kotler · 12 years ago
  60. 8199f0b Add DbgVariable::resolve per Eric's suggestion. by Manman Ren · 12 years ago
  61. 4325100 Debug Info: rename getOriginalTypeSize to getBaseTypeSize. by Manman Ren · 12 years ago
  62. 017ceda Debug Info: take advantage of the existing CU::resolve. by Manman Ren · 12 years ago
  63. d88ccb6 Move DIRef::getName out of line. by Manman Ren · 12 years ago
  64. 3e6a3be [mips] Simplify and optimize code. by Akira Hatanaka · 12 years ago
  65. 194d437 Add some xfaild R600 tests. by Matt Arsenault · 12 years ago
  66. e3c2f07 IRBuilder: Downgrade InsertPointGuard's instruction pointer to a raw pointer. by Benjamin Kramer · 12 years ago
  67. b359bda Let rotr and bswap be handled by expansion for Mips16 since we don't by Reed Kotler · 12 years ago
  68. eb59e4d Removing unintended code block from lli by Andrew Kaylor · 12 years ago
  69. 2565de9 Grammar. by Eric Christopher · 12 years ago
  70. 88fc701 Fix build on Solaris 11. by Rafael Espindola · 12 years ago
  71. 5a0169f Only modify lto.exports.def when contents have changed. by Rafael Espindola · 12 years ago
  72. 320296a Add a MCTargetStreamer interface. by Rafael Espindola · 12 years ago
  73. 26c46ba SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default] by NAKAMURA Takumi · 12 years ago
  74. 35741ad Prune trailing linefeeds. by NAKAMURA Takumi · 12 years ago
  75. 38aceb8 [Sparc] Implement JIT for SPARC. by Venkatraman Govindaraju · 12 years ago
  76. d55fed1 Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building. by Craig Topper · 12 years ago
  77. 75172ad Fix a typo in the mattr part of the run line. by Craig Topper · 12 years ago
  78. d8feb1f Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines post r192171. by Craig Topper · 12 years ago
  79. b9bc438 Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse. by Craig Topper · 12 years ago
  80. 3bd3419 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead. by Venkatraman Govindaraju · 12 years ago
  81. d79f6f7 typo. by Adrian Prantl · 12 years ago
  82. a204ac9 typo. by Adrian Prantl · 12 years ago
  83. 82c7414 Reduce testcase from 1r92011. by Adrian Prantl · 12 years ago
  84. 0d94d8f update mach-o EXPORT_SYMBOL_* names by Nick Kledzik · 12 years ago
  85. 29150e4 cmake: don't set LLVM_COMPILER_IS_GCC_COMPATIBLE when using clang-cl by Hans Wennborg · 12 years ago
  86. 34e1444 Windows: Avoiding resizing, use uninitialized data() instead by David Majnemer · 12 years ago
  87. d56cba0 [mips] Test case for r192124. by Akira Hatanaka · 12 years ago
  88. 1ee3c00 LoopVectorize: External uses must use the last value in a reduction cycle by Arnold Schwaighofer · 12 years ago
  89. 42be15f Add Mips16 patterns for sign extend byte and sign extend halfword. by Reed Kotler · 12 years ago
  90. fb92f46 Struct byval: use the correct alignment for loads generated to load by Manman Ren · 12 years ago
  91. 116189a [mips] Coding style clean up. by Akira Hatanaka · 12 years ago
  92. c746503 [mips] Disable tail merging when long branch pass is enabled. by Akira Hatanaka · 12 years ago
  93. 51a8280 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64. by Benjamin Kramer · 12 years ago
  94. 96ba8cb [mips] Define method MipsSubtarget::enableLongBranchPass. by Akira Hatanaka · 12 years ago
  95. 23eb907 Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it by Alexey Samsonov · 12 years ago
  96. 243702b [mips] Fix definition of mfhi and mflo instructions to read from the whole by Akira Hatanaka · 12 years ago
  97. 379f76e Formally added an explicit enum for DWARF TLS support. No functionality change. by Richard Mitton · 12 years ago
  98. c4a8c07 Change objectsize intrinsic to accept different address spaces. by Matt Arsenault · 12 years ago
  99. ca7b2d0 [ARM] Improve build attributes emission. by Amara Emerson · 12 years ago
  100. 2aeb477 [AArch64] Add support for NEON scalar arithmetic instructions: by Chad Rosier · 12 years ago