1. 75d423f Add the -mcpu= option to llvm-objdump for use with the disassemblers. by Kevin Enderby · 11 years ago
  2. 41d6599 MC X86: Accept ".att_syntax prefix" and diagnose noprefix by Reid Kleckner · 11 years ago
  3. a0a7ad4 Revert "Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself."" by David Blaikie · 11 years ago
  4. e15fd3d fix typo by Sanjay Patel · 11 years ago
  5. 6d48faf getNewMemBuffer memsets the buffer to zeros, by Yaron Keren · 11 years ago
  6. b9736ca Fix a test that has no checks. by Sanjay Patel · 11 years ago
  7. 60178b1 R600: Cleanup fadd and fsub tests by Matt Arsenault · 11 years ago
  8. 2764f3d Revert "r214897 - Remove dead zero store to calloc initialized memory" by Rui Ueyama · 11 years ago
  9. 41612a9 Remove the target machine from CCState. Previously it was only used by Eric Christopher · 11 years ago
  10. 6cdc374 Improve performance of calculateDbgValueHistory. by Adrian Prantl · 11 years ago
  11. 6e62bbd Cleanup collectChangingRegs by Adrian Prantl · 11 years ago
  12. e7a280a DebugInfo: Fix ranges+gmlt test case to actually exercise the gmlt situation. by David Blaikie · 11 years ago
  13. 7911f2d Add a triple to this test to get the right IR mangling by Reid Kleckner · 11 years ago
  14. 5d04e52 Don't count inreg params when mangling fastcall functions by Reid Kleckner · 11 years ago
  15. 9688239 Round up the size of byval arguments to MinAlign by Reid Kleckner · 11 years ago
  16. 2669f9b UseListOrder: Use std::vector by Duncan P. N. Exon Smith · 11 years ago
  17. af4e764 [AArch64] Add a few isTarget* API to AArch64 Subtarget. by Chad Rosier · 11 years ago
  18. 4e78deb Add test case omitted in r214974. by Chad Rosier · 11 years ago
  19. b47a215 [AArch64] Fix OS ABI flag for aarch64-linux-gnu target. by Chad Rosier · 11 years ago
  20. 72a8b11 use register iterators that include self to reduce code duplication in CriticalAntiDepBreaker by Sanjay Patel · 11 years ago
  21. ec4188b [AVX512] Added load/store instructions to Register2Memory opcode tables. by Robert Khasanov · 11 years ago
  22. e0243fb [AArch64] Add a testcase for r214957. by James Molloy · 11 years ago
  23. 2d98881 Add a new option -run-slp-after-loop-vectorization. by James Molloy · 11 years ago
  24. 2c0d42a ARM: do not generate BLX instructions on Cortex-M CPUs. by Tim Northover · 11 years ago
  25. 08828a9 ARM-MachO: materialize callee address correctly on v4t. by Tim Northover · 11 years ago
  26. c2482df [AArch64] Conditional selects are expensive on out-of-order cores. by James Molloy · 11 years ago
  27. a341a80 [x86] Fix two independent miscompiles in the process of getting the same by Chandler Carruth · 11 years ago
  28. 346b687 [x86] Switch to a formulation of a for loop that is much more obviously by Chandler Carruth · 11 years ago
  29. 2b9b503 [X86] Fixes commit r214890 to match the posted patch by Adam Nemet · 11 years ago
  30. e3ef543 Correct comment by Matt Arsenault · 11 years ago
  31. 95d1d44 [dfsan] Try not to create too many additional basic blocks in functions which by Peter Collingbourne · 11 years ago
  32. 85dc7da R600: Increase nearby load scheduling threshold. by Matt Arsenault · 11 years ago
  33. c9c70b1 R600/SI: Implement areLoadsFromSameBasePtr by Matt Arsenault · 11 years ago
  34. 5200d84 [X86][SchedModel] Fixed some wrong scheduling model found by code inspection. by Quentin Colombet · 11 years ago
  35. 8480bee DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. by David Blaikie · 11 years ago
  36. 406658c DebugInfo: Fix a bunch of tests that, owing to their compile_unit metadata not including a 13th field, had some subtle behavior. by David Blaikie · 11 years ago
  37. f1ca953 R600/SI: Add definitions for ds_read2st64_ / ds_write2st64_ by Matt Arsenault · 11 years ago
  38. 5e48675 Fix typos in comments and doc by JF Bastien · 11 years ago
  39. 5bfa4ba DebugInfo: Move the reference to the CU from the location list entry to the list itself, since it is constant across an entire list. by David Blaikie · 11 years ago
  40. 9920f56 Remove a virtual function from TargetMachine. NFC. by Rafael Espindola · 11 years ago
  41. b23c2d9 Re-apply r214881: Fix return sequence on armv4 thumb by Jonathan Roelofs · 11 years ago
  42. 416ea4b [MCJIT] Make llvm-rtdyld check RuntimeDyld's error state when running in -verify by Lang Hames · 11 years ago
  43. bb639a1 [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian by Bill Schmidt · 11 years ago
  44. 998edc6 Improved test cases that were added with r214892. by Sanjay Patel · 11 years ago
  45. 0ca2867 Don't internalize all but main by default. by Rafael Espindola · 11 years ago
  46. 936a1b5 Add a test showing the interaction of linker scripts and plugin. by Rafael Espindola · 11 years ago
  47. fadc91b [x86] Fix a crasher due to shuffles which cancel each other out and add by Chandler Carruth · 11 years ago
  48. b72118f Remove dead code in condition by Duncan P. N. Exon Smith · 11 years ago
  49. 8d7feda X86CodeEmitter.cpp: Add SEH_Epilogue to ignored list for legacy JIT, corresponding to r214775. by NAKAMURA Takumi · 11 years ago
  50. c64a059 [X86] Improve comments for r214888 by Adam Nemet · 11 years ago
  51. c1072cf R600/SI: Use register class instead of list of registers by Matt Arsenault · 11 years ago
  52. 178066b R600/SI: Add exec_lo and exec_hi subregisters. by Matt Arsenault · 11 years ago
  53. 7f2cd21 BitcodeReader: Fix non-determinism in use-list order by Duncan P. N. Exon Smith · 11 years ago
  54. b835f34 Remove dead zero store to calloc initialized memory by Philip Reames · 11 years ago
  55. c2feb6b Revert r214881 because it broke lots of build-bots by Jonathan Roelofs · 11 years ago
  56. 6902c68 Optimize vector fabs of bitcasted constant integer values. by Sanjay Patel · 11 years ago
  57. 545f892 [AVX512] Add masking variant and intrinsics for valignd/q by Adam Nemet · 11 years ago
  58. b1f410a [X86] Increase X86_MAX_OPERANDS from 5 to 6 by Adam Nemet · 11 years ago
  59. af98f76 [X86] Add lowering to VALIGN by Adam Nemet · 11 years ago
  60. b4d5897 [X86] Separate DAG node for valign and palignr by Adam Nemet · 11 years ago
  61. fd52de3 [AVX512] alignr: Use suffix rather than name argument to multiclass by Adam Nemet · 11 years ago
  62. c2b5d99 [AVX512] Pull everything alignr-related into the multiclass by Adam Nemet · 11 years ago
  63. 0ae6dc9 Wrap long lines by Adam Nemet · 11 years ago
  64. 77327b8 Fix return sequence on armv4 thumb by Jonathan Roelofs · 11 years ago
  65. 1d15bbc Partially revert r214761 that asserted that all concrete debug info variables had DIEs, due to a failure on Darwin. by David Blaikie · 11 years ago
  66. effcb72 Improve test for merged global debug info by using llvm-dwarfdump. by David Blaikie · 11 years ago
  67. 2888b08 Add accessors for the PPC 403 bank registers. by Joerg Sonnenberger · 11 years ago
  68. 84bd563 Add tests for cp10/cp11 on ARMv5/6 by Renato Golin · 11 years ago
  69. f2115a0 Specify that the thumb setend and blx <immed> instructions are not valid on an m-class target by Keith Walker · 11 years ago
  70. 966fc93 Define stc2/stc2l/ldc2/ldc2l as thumb2 instructions by Keith Walker · 11 years ago
  71. bb97134 Accessors for SSR2 and SSR3 on PPC 403. by Joerg Sonnenberger · 11 years ago
  72. 94dfb88 R600/SI: Update MUBUF assembly string to match AMD proprietary compiler by Tom Stellard · 11 years ago
  73. 9a7e35a R600/SI: Avoid generating REGISTER_LOAD instructions. by Tom Stellard · 11 years ago
  74. deaa09e Add dci/ici instructions for PPC 476 and friends. by Joerg Sonnenberger · 11 years ago
  75. 2bdd960 Add mftblo and mftbhi for PPC 4xx. by Joerg Sonnenberger · 11 years ago
  76. 0f36574 Add lswi / stswi for assembler use with a warning to not add patterns for them. by Joerg Sonnenberger · 11 years ago
  77. 68b3d68 AArch64: Add support for instruction prefetch intrinsic by Yi Kong · 11 years ago
  78. 72035e9 Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost. by James Molloy · 11 years ago
  79. ff8028c [x86] Reformat some code I moved around in a prior commit but left by Chandler Carruth · 11 years ago
  80. c754b57 Allow binary and for tblgen math. by Joerg Sonnenberger · 11 years ago
  81. e6329cf [x86] Fix a crash and wrong-code bug in the new vector lowering all by Chandler Carruth · 11 years ago
  82. baa40c6 [FastIsel][AArch64] Fix previous commit r214844 (Don't perform sign-/zero-extension for function arguments that have already been sign-/zero-extended.) by Juergen Ributzka · 11 years ago
  83. eee659a [FastISel][AArch64] Implement the FastLowerArguments hook. by Juergen Ributzka · 11 years ago
  84. 6739735 Revert "r214832 - MachineCombiner Pass for selecting faster instruction" by Kevin Qin · 11 years ago
  85. 7e9c0bc [FastISel][AArch64] Don't perform sign-/zero-extension for function arguments that have already been sign-/zero-extended. by Juergen Ributzka · 11 years ago
  86. d047a9d Provide convenient access to the zext/sext attributes of function arguments. NFC. by Juergen Ributzka · 11 years ago
  87. 6035518 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  88. c2328d5 MachineCombiner Pass for selecting faster instruction sequence on AArch64 by Gerolf Hoflehner · 11 years ago
  89. e2f9c8d Add TCR register access by Joerg Sonnenberger · 11 years ago
  90. 7c5b978 Add PPC 603's tlbld and tlbli instructions. by Joerg Sonnenberger · 11 years ago
  91. 94a1af5 Allow CP10/CP11 operations on ARMv5/v6 by Renato Golin · 11 years ago
  92. 84fef1f [PPC64LE] Fix wrong IR for vec_sld and vec_vsldoi by Bill Schmidt · 11 years ago
  93. 2a78a0c Enable Darwin vararg parameters support in assembler macros. by Kevin Enderby · 11 years ago
  94. 3da0245 Changed the liveness tracking in the RegisterScavenger by Pedro Artigas · 11 years ago
  95. db3ce56 Add simplified aliases for access to DCCR, ICCR, DEAR and ESR by Joerg Sonnenberger · 11 years ago
  96. e85047e Fix SmallDenseMap assignment operator. by Andrew Trick · 11 years ago
  97. 2c68cde [FastISel][AArch64] Fix shift lowering for i8 and i16 value types. by Juergen Ributzka · 11 years ago
  98. 3bc3e03 IR: Fix up doxygen comment for LLVMContext::diagnose by Justin Bogner · 11 years ago
  99. 8a74e2f [SDAG] Fix a really, really terrible bug in the DAG combiner. by Chandler Carruth · 11 years ago
  100. 25c8b47 tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs. by Joerg Sonnenberger · 11 years ago