- 942eb00 llvm-object: Add inline relocation information to disassembly. by Michael J. Spencer · 14 years ago
- b414142 Enhance the memdep interface so that users can tell the difference between a dependency which cannot be calculated and a path reaching the entry point of the function. This patch introduces isNonFuncLocal, which replaces isUnknown in some cases. by Eli Friedman · 14 years ago
- 48ba0e4 Reapply r141870, SCEV expansion of post-inc. by Andrew Trick · 14 years ago
- fe28ef4 Don't forget to reconstruct D after changing the scope that we're looking at. by Eric Christopher · 14 years ago
- a4d326d Update IntrinsicsXCore.td with the normal LLVM notice at the top of the file. by Richard Osborne · 14 years ago
- 14a5f46 llvm-objdump: Fix whitespace. by Michael J. Spencer · 14 years ago
- 178dbd4 llvm-objdump: Fix dumping of multiple symbols with the same address. by Michael J. Spencer · 14 years ago
- bff6f86 COFF: Implement sectionContainsSymbol for relocatable files only. by Michael J. Spencer · 14 years ago
- 7f1653a Fix memory corruption I introduced a few checkins ago. by Andrew Trick · 14 years ago
- e9d3c1c configure: [cygming] Set --disable-embed-stdcxx by default on --enable-shared. by NAKAMURA Takumi · 14 years ago
- c18e940 SETEND is not allowed in an IT block. by Owen Anderson · 14 years ago
- 753e02a Revert r141870. The test case crashes on linux with data corruption. A deeper issue was exposed. by Andrew Trick · 14 years ago
- e0af2ad docs/CMake.html: Clarify LLVM_LIT_TOOLS_DIR as :PATH. by NAKAMURA Takumi · 14 years ago
- c8f6c44 Fix incorrect ELF typedefs. by Michael J. Spencer · 14 years ago
- b001759 LSR: Reuse the post-inc expansion of expressions. by Andrew Trick · 14 years ago
- 5d332f8 build: Remove some stray LLVMC configure variables. by Daniel Dunbar · 14 years ago
- 94f01db SCEV: Rewrite TrandformForPostIncUse to handle expression DAGs, not by Andrew Trick · 14 years ago
- ce1823c Slightly more useful tracing. by Andrew Trick · 14 years ago
- d38e99e Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs. by Benjamin Kramer · 14 years ago
- 898f336 Mark 'branch indirect' instruction as an indirect branch. by Kalle Raiskila · 14 years ago
- 4e68054 More closely follow libgcc, which has code after the `ret' instruction to by Bill Wendling · 14 years ago
- 1203fe7 Revert r141854 because it was causing failures: by Bill Wendling · 14 years ago
- 82222c2 Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I. by Bill Wendling · 14 years ago
- 326e491 Use an existing method. by Cameron Zwarich · 14 years ago
- 8ab1d1e Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. by Craig Topper · 14 years ago
- d501c71 Add 'implicit EFLAGS' to patterns for popcnt and lzcnt by Craig Topper · 14 years ago
- f77dea1 Elf_Word is not POD! Stop using it in a DenseMap. by Nick Lewycky · 14 years ago
- dec1b10 If MI is deleted then remove it from the set. If a new MI is created, it could by Nick Lewycky · 14 years ago
- ea3abd5 Tabs to spaces. by Nick Lewycky · 14 years ago
- 3821b18 Add missing braces to pacify GCC's -Wparentheses. by Nick Lewycky · 14 years ago
- fc61a23 Add missing ELF constants. by Michael J. Spencer · 14 years ago
- dee83c9 Also inflate register classes around inline asm. by Jakob Stoklund Olesen · 14 years ago
- f591697 Add MachineInstr::getRegClassConstraint(). by Jakob Stoklund Olesen · 14 years ago
- 9dfaacb Extract a method for finding the inline asm flag operand. by Jakob Stoklund Olesen · 14 years ago
- 459b74b Encode register class constreaints in inline asm instructions. by Jakob Stoklund Olesen · 14 years ago
- a3a1635 Attempt to fix MSVC build. by Eli Friedman · 14 years ago
- f6fb7ed We need to verify that the machine instruction we're using as a replacement for by Bill Wendling · 14 years ago
- 5c75af6 Use a utility from MathExtras to clarify a check and avoid undefined behavior. Based on patch by Ahmed Charles. by Eli Friedman · 14 years ago
- 95f8db4 The VMAs stored in the symbol table of a MachO file are absolute addresses, not offsets from the section. by Owen Anderson · 14 years ago
- a046d2f Use unsigned multiply to hash integers, so we don't end up with undefined behavior for large signed integers. Based on patch by Ahmed Charles. by Eli Friedman · 14 years ago
- 68df750 Removed colons from some target datalayout strings in test, since they don't match the required format. by Lang Hames · 14 years ago
- 10a8c62 Don't label a STAB debugging symbol as a function symbol. by Owen Anderson · 14 years ago
- cd74988 sectionContainsSymbol needs to be based on VMA's rather than section indices to properly account for files with segment load commands that contain no sections. by Owen Anderson · 14 years ago
- 18ead6b Fix a couple hash functions so that they do not depend on undefined shifts. Based on patch by Ahmed Charles. by Eli Friedman · 14 years ago
- 81b2928 ARM addrmode5 represents the 'U' bit of the encoding backwards. by Jim Grosbach · 14 years ago
- 90196fc Fix APFloat::getSmallestNormalized so the shift doesn't depend on undefined behavior. Patch from Ahmed Charles. by Eli Friedman · 14 years ago
- 7247a5f Fix APFloat::getLargest so that it actually returns the correct value. Found by accident while reviewing a patch to nearby code. by Eli Friedman · 14 years ago
- 4124294 Section indices in MachO symbol tables begin at 1, not 0. by Owen Anderson · 14 years ago
- acbaecd Finish supporting cpp #file/line comments in assembler for error messages. So by Kevin Enderby · 14 years ago
- 7007e4c Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions. by Evan Cheng · 14 years ago
- 980df16 To find the exiting VN of a LiveInterval from a block, use the previous slot by Cameron Zwarich · 14 years ago
- c66e7af Thumb2 assembly parsing and encoding for LDC/STC. by Jim Grosbach · 14 years ago
- 18ad76b Hoist vector.size() computation out of the loop. No functionality change. by Nick Lewycky · 14 years ago
- b0786b3 addrmode2 is gone from these, so no need for the reg0 operand. by Jim Grosbach · 14 years ago
- 9f45754 ARM encoding tests for STC. by Jim Grosbach · 14 years ago
- 9b8f2a0 ARM parsing and encoding for the <option> form of LDC/STC instructions. by Jim Grosbach · 14 years ago
- 01208d5 80 columns. by Jim Grosbach · 14 years ago
- bc9c802 Tidy up. Formatting. by Jim Grosbach · 14 years ago
- 9e15d65 Fix a thinko that Nick noticed. The previous code actually worked as by Dan Gohman · 14 years ago
- 18dcb87 lib/Object/ELFObjectFile.cpp: Fix undefined behavior for MC/ELF/many-section.s not to fail (on msvc). by NAKAMURA Takumi · 14 years ago
- a2e8791 Expand the check for a landing pad so that it looks at the basic block's by Bill Wendling · 14 years ago
- 22e8a36 Use an existing function. by Jakob Stoklund Olesen · 14 years ago
- 41f9a43 Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it. by Akira Hatanaka · 14 years ago
- 6baabc1 Fix encoding of 32-bit integer instructions. Change names of operands and nodes. by Akira Hatanaka · 14 years ago
- d0851aa Make this use a public accessor too. by Eric Christopher · 14 years ago
- 865703e Add missing space. by Nick Lewycky · 14 years ago
- 1f9c686 Fix indent in comment. by Nick Lewycky · 14 years ago
- 7efba85 Fix r141744. by Evan Cheng · 14 years ago
- 1c062c2 Fix -widen-vmovs liveness issues. by Jakob Stoklund Olesen · 14 years ago
- fad6287 Refine r141689 with a tri-state variable. by Evan Cheng · 14 years ago
- 80eb994 Change name of class to ArithOverflowR. by Akira Hatanaka · 14 years ago
- 2dfd3a9 Define class ArithLogicI. Make 32-bit and 64-bit arithmetic and logical by Akira Hatanaka · 14 years ago
- b75e5d9 Make this test more specific. There are 3 stats that matched "machine-licm". by Bob Wilson · 14 years ago
- 3c43b48 Use public accessors on the scope that is returned. by Eric Christopher · 14 years ago
- 76d9f1c Fix comment. by Akira Hatanaka · 14 years ago
- c2f3ac9 Define classes ArithLogicR and ArithLogicOfR and make 32-bit and 64-bit by Akira Hatanaka · 14 years ago
- e4617b0 target data is a contract with the code generator, not the "processor" by Chris Lattner · 14 years ago
- 6509f50 improve some of the documentation around target data layout strings. by Chris Lattner · 14 years ago
- 6618a24 Add a new wrapper node for a DILexicalBlock that encapsulates it and a by Eric Christopher · 14 years ago
- 5ba7b50 Formatting. by Eric Christopher · 14 years ago
- 0f69197 Spacing. by Eric Christopher · 14 years ago
- c83693f N.B. This is with the new EH scheme: by Bill Wendling · 14 years ago
- 68ad567 Fix function isUnalignedLoadStore. by Akira Hatanaka · 14 years ago
- 2bd0118 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. by Jim Grosbach · 14 years ago
- d8212b2 Remove unused PatLeaf. by Akira Hatanaka · 14 years ago
- 7cc037a Change the names of 64-bit logical instructions so that they match the names of by Akira Hatanaka · 14 years ago
- e575499 Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... by Bill Wendling · 14 years ago
- 395d76c Remove redundancy in setcc patterns using multiclass. by Akira Hatanaka · 14 years ago
- c055a87 Fix PR11106 by correcting a typo that has been in the code for over a year. This by Cameron Zwarich · 14 years ago
- b07a3d6 Use sltiu instead of sltu when a register operand and immediate are compared. by Akira Hatanaka · 14 years ago
- fbab220 Update test for r141704. by Jim Grosbach · 14 years ago
- 2cf8dd3 ARM addressing mode cleanup for LDC/STC. by Jim Grosbach · 14 years ago
- 2c607b6 Clean up a few references to System/. We still have docs/SystemLibrary.html by Daniel Dunbar · 14 years ago
- b5e8bc1 Support/DataTypes.h: Clean up some types and add matching (but presumably by Daniel Dunbar · 14 years ago
- 830378f Remove extra semicolon. by Eli Friedman · 14 years ago
- 06f8231 Add patterns for conditional branches with 64-bit register operands. by Akira Hatanaka · 14 years ago
- 8191f34 Add support for 64-bit set-on-less-than instructions. by Akira Hatanaka · 14 years ago
- 3e3427a Add support for conditional branch instructions with 64-bit register operands. by Akira Hatanaka · 14 years ago
- 2e35047 Add dominance check for the instruction being hoisted. by Devang Patel · 14 years ago
- 5f119a6 Fixed docs to reflect the proper default value and behaviour of the natural stack alignment. by Lang Hames · 14 years ago