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review.blissroms.org / platform_external_llvm80 / a71b5d3c63289299e6dc0ed2d282698165cae421
  1. a71b5d3 [X86][Znver1] Use SchedAlias to tag microcoded scheduler classes by Simon Pilgrim · 7 years ago
  2. bf0b5f5 Fix include of config.h that was incorrectly changed in r331184 by Justin Bogner · 7 years ago
  3. b841e3b [InstCombine] refine select-of-constants to bitwise ops by Sanjay Patel · 7 years ago
  4. 57342fb GlobalISel: Use a callback to compute constrained reg class for unallocatble registers by Tom Stellard · 7 years ago
  5. 3a0c276 [ThinLTO] Add support for optimization remarks to thinBackend by Teresa Johnson · 7 years ago
  6. da9cac6 [PowerPC] add more FMF debug output; NFC by Sanjay Patel · 7 years ago
  7. 3e77bbe [X86][AVX512] VPLZCNT instructions match SchedWriteVecIMul scheduling class not SchedWriteVecALU. by Simon Pilgrim · 7 years ago
  8. c9b6835 [X86] Split WriteVecShift/WriteVarVecShift into MMX, XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  9. 00c1a23 [PowerPC] add tests for FMF propagation; NFC by Sanjay Patel · 7 years ago
  10. ad2b36f [DebugInfo] Correction for an assert in DIExpression::createFragmentExpression by Bjorn Pettersson · 7 years ago
  11. 5c16236 Reapply "[SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)" by Bjorn Pettersson · 7 years ago
  12. d8f6aa4 use LLVM's standard CMakeLists.txt layout for llvm-xray by Nico Weber · 7 years ago
  13. e14cfef [CodeGen][X86][NFC] Copy two selectcc tests from AArch64. by Roman Lebedev · 7 years ago
  14. 2cc6ed7 [X86] Split WriteVecALU/WritePHAdd into XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  15. 4c19071 ARM: don't try to over-align large vectors as arguments. by Tim Northover · 7 years ago
  16. 4d0342f perform DSE through launder.invariant.group by Piotr Padlewski · 7 years ago
  17. 9648b46 Rename invariant.group.barrier to launder.invariant.group by Piotr Padlewski · 7 years ago
  18. d0aaa15 [X86][AVX512] VPAVG instructions should be tagged as SchedWriteVecALU by Simon Pilgrim · 7 years ago
  19. 4c3bf0a [X86] Split WriteVecIMul/WriteVecPMULLD/WriteMPSAD/WritePSADBW into XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  20. aa8d271 [X86] Update MMX instructions to be tagged with X86SchedWriteWidths types by Simon Pilgrim · 7 years ago
  21. b3f6a6a [WebAssembly] MC: Don't litter test directory. by Benjamin Kramer · 7 years ago
  22. 5675d3b Revert "[SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)" by Martin Storsjo · 7 years ago
  23. 2d481a9 [TableGen][NFC] Make ResourceCycles definitions more explicit. by Clement Courbet · 7 years ago
  24. b5d9edc [LoopIdiomRecognize] When looking for 'x & (x -1)' for popcnt, make sure the left hand side of the 'and' matches the left hand side of the 'subtract' by Craig Topper · 7 years ago
  25. 524b220 [LoopIdiomRecognize] Add a test case showing that we transform to ctpop without fully checking the 'x & (x-1)' part. by Craig Topper · 7 years ago
  26. 616f8fb [LoopIdiomRecognize] Remove unnecessary cast from BinaryOperator to Instruction. NFC by Craig Topper · 7 years ago
  27. 886c0f8 lit: flesh out `SubsituteCaptures` further by Saleem Abdulrasool · 7 years ago
  28. cfd8663 Re-enable "[SCEV] Make computeExitLimit more simple and more powerful" by Max Kazantsev · 7 years ago
  29. e776b8b [Support] Support building LLVM for Fuchsia by Petr Hosek · 7 years ago
  30. b9e51cf [ObjCARC] Convert an if to an early continue. NFC by Shoaib Meenai · 7 years ago
  31. 034a688 Commit r331416 breaks the big-endian PPC bot. On the big endian build, we by Nemanja Ivanovic · 7 years ago
  32. dc1628b [gcov] Switch to an explicit if clunky array to satisfy some compilers by Chandler Carruth · 7 years ago
  33. ecfd97d MachineInst support mapping SDNode fast math flags for support in Back End code generation by Michael Berg · 7 years ago
  34. 7577f35 [PowerPC] Implement isMaskAndCmp0FoldingBeneficial by Nemanja Ivanovic · 7 years ago
  35. 1c4e4c4 [WebAssembly] MC: Create and use first class section symbols by Sam Clegg · 7 years ago
  36. 1e2e5ff [MC] Factor MCObjectStreamer::addFragmentAtoms out of MachO streamer. by Sam Clegg · 7 years ago
  37. 47a8f72 [PowerPC] No CTR loop if the candidate exiting block is in a different loop by Nemanja Ivanovic · 7 years ago
  38. df9a986 [GCOV] Emit the writeout function as nested loops of global data. by Chandler Carruth · 7 years ago
  39. 8f8e40c [llvm-rc] Default to writing the output next to the input, if no output is specified by Martin Storsjo · 7 years ago
  40. 0f7c92a [llvm-cvtres] Allow parameters preceded by '-' in addition to '/' by Martin Storsjo · 7 years ago
  41. 80e28a9 [llvm-objcopy] Add --discard-all (-x) option by Paul Semel · 7 years ago
  42. 21e59fd [GlobalISel][InstructionSelect] Making Coverage Info generation optional on per-match table basis by Roman Tereshin · 7 years ago
  43. b4db044 [llvm-objcopy] Add --weaken option by Paul Semel · 7 years ago
  44. 260d84a [GlobalISel][InstructionSelect] Refactoring buildMatchTable out, NFC by Roman Tereshin · 7 years ago
  45. 36d15d6 [GlobalISel][InstructionSelect] Refactoring out a getMatchTable virtual method + other small NFC's by Roman Tereshin · 7 years ago
  46. e99f5b4 [llvm-rc] Add rudimentary support for codepages by Martin Storsjo · 7 years ago
  47. 4e899cb [X86][SNB] Fix scheduling of MMX integer multiply instructions. by Simon Pilgrim · 7 years ago
  48. 06eed39 Move the TestPlugin project into the Tests folder in CMake. by Aaron Ballman · 7 years ago
  49. 4d488f3 [X86] Split WriteShuffle/WriteVarShuffle + WriteBlend/WriteVarBlend into XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  50. b5c75dc [COFF, ARM64] Hook up a few remaining relocations by Martin Storsjo · 7 years ago
  51. 7edace1 [AMDGPU] A trivial fix for a buildbot failure caused by "commit 224a839fcbbead221f872cd32a1dd0c308d37299". by Farhana Aleen · 7 years ago
  52. 1bfbf81 [reassociate] Fix excessive revisits when processing long chains of reassociatable instructions. by Daniel Sanders · 7 years ago
  53. 598de77 [X86] Cleanup WriteFShuffle/WriteFVarShuffle (+256 variants) scheduler classes with more common default values by Simon Pilgrim · 7 years ago
  54. f6719ae Add assertion to padding size calculation, NFC by Krzysztof Parzyszek · 7 years ago
  55. 301a226 Revert "[AMDGPU] performAddCombine should run after DAG is legalized." by Farhana Aleen · 7 years ago
  56. 6ad7abc [X86] Convert most remaining XOP uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths. by Simon Pilgrim · 7 years ago
  57. 432963d [AMDGPU] performAddCombine should run after DAG is legalized. by Farhana Aleen · 7 years ago
  58. f445048 Fix line-endings. NFCI. by Simon Pilgrim · 7 years ago
  59. 202b0b5 Re-land rL331357 "[X86] Fix scheduling info for VMPSADBWYrmi." by Clement Courbet · 7 years ago
  60. 05610b5 [X86] Cleanup WriteFMul scheduler classes with more common default values by Simon Pilgrim · 7 years ago
  61. 4f6742d Fix '32-bit shift implicitly converted to 64 bits' warning by using APInt::setBit instead. by Simon Pilgrim · 7 years ago
  62. 17307b0 Revert rL331355 "[X86] Fix scheduling info for VMPSADBWYrmi." by Clement Courbet · 7 years ago
  63. 4f646b0 [X86] Fix scheduling info for (V?)SQRTPDm on silvermont. by Clement Courbet · 7 years ago
  64. cf0ce43 [X86] Fix scheduling info for VMPSADBWYrmi. by Clement Courbet · 7 years ago
  65. f17b4d4 [MIPS] Fix DIV/DIVU scheduling classes. by Clement Courbet · 7 years ago
  66. 97ed34f [X86] Convert most remaining AVX512 uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths. by Simon Pilgrim · 7 years ago
  67. 2b361d8 [AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions. by Sander de Smalen · 7 years ago
  68. d8fa26e [TableGen] Don't quote variable name when printing !foreach. by Simon Tatham · 7 years ago
  69. 0a3e3f4 [AArch64][SVE] Asm: Support for scatter ST1 store instructions. by Sander de Smalen · 7 years ago
  70. d0aace5 Revert "[mips] Correct the predicates of sign extension instructions" by Simon Dardis · 7 years ago
  71. c2f6682 [X86] Convert most remaining uses of X86SchedWritePair scheduler classes to X86SchedWriteWidths. by Simon Pilgrim · 7 years ago
  72. b997056 [mips] Correct the predicates of sign extension instructions by Simon Dardis · 7 years ago
  73. f05d034 [AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/store instructions. by Sander de Smalen · 7 years ago
  74. 6e79b3c [LoopInterchange] Update some loops to use range base for loops (NFC). by Florian Hahn · 7 years ago
  75. 112e4a3 [mips] Correct the predicates for shifts. by Simon Dardis · 7 years ago
  76. 3a58e1f [X86] Cleanup WriteFAdd/WriteFCmp scheduler classes with more common default values by Simon Pilgrim · 7 years ago
  77. 33b9c81 [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions. by Sander de Smalen · 7 years ago
  78. a5108a0 Mark invariant.group.barrier as inaccessiblememonly by Piotr Padlewski · 7 years ago
  79. dd5fd46 [SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2) by Bjorn Pettersson · 7 years ago
  80. f4f861b [XRay][tools] Rename llvm-xray filenames from .cc -> .cpp (NFC) by Dean Michael Berris · 7 years ago
  81. 81352e1 Fix release build breakage by Sam Clegg · 7 years ago
  82. ac13592 [WebAssembly] Fix debug printing of symbol types by Sam Clegg · 7 years ago
  83. ff933fa [llvm-mca] Lift the logic of the RetireControlUnit from the Dispatch translation unit into its own translation unit. NFC by Matt Davis · 7 years ago
  84. 20a92cd [AMDGPU] Support horizontal vectorization. by Farhana Aleen · 7 years ago
  85. 090f815 [CFLGraph][NFC] Simplify/reorder switch in visitConstantExpr by David Bolvansky · 7 years ago
  86. 2f7417d [AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compare by Sanjay Patel · 7 years ago
  87. bcc7a8e [AggressiveInstCombine] add more bitfield test patterns; NFC by Sanjay Patel · 7 years ago
  88. b68ff82 [PhaseOrdering] add tests for bittest patterns from bitfields; NFC by Sanjay Patel · 7 years ago
  89. b5a4cf0 Create a MachineBasicBlock for created IR-level BasicBlock by Jessica Paquette · 7 years ago
  90. 792a593 [AArch64] Add more tests for 64-bit immediate lowering. by Eli Friedman · 7 years ago
  91. 1ae0aae [DAGCombiner] Fix SDLoc in a (zext (zextload x)) combine (4/N) by Vedant Kumar · 7 years ago
  92. cad24a0 [DAGCombiner] Fix SDLoc in a (sext (sextload x)) combine (3/N) by Vedant Kumar · 7 years ago
  93. fec188e [DAGCombiner] Change the SDLoc on split extloads (2/N) by Vedant Kumar · 7 years ago
  94. f3a5c86 [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) by Vedant Kumar · 7 years ago
  95. 53f34ec AMDGPU: Remove remnants of gfx901 (it was deprecated some time ago) by Konstantin Zhuravlyov · 7 years ago
  96. 7efbee1 [X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection. by Roman Lebedev · 7 years ago
  97. 6cdbf16 [X86] Split WriteFMul/WriteFDiv into XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  98. df69f1f llvm-symbolizer: Handle function definitions nested within other functions by David Blaikie · 7 years ago
  99. 8864a3a [X86] Split WriteFRcp/WriteFRsqrt/WriteFSqrt into XMM and YMM/ZMM scheduler classes by Simon Pilgrim · 7 years ago
  100. 082b4ed Use no-op opt run to eliminate the difference in bb pred comment, per chandler's suggestion. It is better than using sed on portability. by Wei Mi · 7 years ago