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review.blissroms.org / platform_external_llvm80 / c6490d138fdff749a423da104f2d29cd41450802
  1. c6490d1 FileCheck-ize these tests. by Bill Wendling · 13 years ago
  2. d5cc8b8 FileCheck-ize these tests. Harden some of them. by Bill Wendling · 13 years ago
  3. 3ef43cf Remove dangling spaces. Fix some other formatting. by Craig Topper · 13 years ago
  4. 7fd5e16 Simplify code a bit and make it compile better. Remove unused parameters. by Craig Topper · 13 years ago
  5. aff5968 Add a missing cpu subtype. by Evan Cheng · 13 years ago
  6. c92ba4e Tidy up. 80 columns, whitespace, et. al. by Jim Grosbach · 13 years ago
  7. a354077 Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). by Nadav Rotem · 13 years ago
  8. 6a8c7bf This patch fixes a problem which arose when using the Post-RA scheduler by Preston Gurd · 13 years ago
  9. 1d52184 ARM: VSLI two-operand assmebly aliases are tblgen'erated. by Jim Grosbach · 13 years ago
  10. e1d866e ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases. by Jim Grosbach · 13 years ago
  11. c34954d ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI. by Jim Grosbach · 13 years ago
  12. 10a3933 Add ARM mode tests for the NEON vector shift-accumulate tests. by Jim Grosbach · 13 years ago
  13. 2b85250 Tidy up. Reformat for ease of reading. by Jim Grosbach · 13 years ago
  14. 13b7352 ARM: vqdmulh two-operand aliases are tblgen'erated now. by Jim Grosbach · 13 years ago
  15. 8dab504 [Support/Unix] Unconditionally include time.h. by Michael J. Spencer · 13 years ago
  16. 216432d Allow forward declarations to take a context. This helps the debugger by Eric Christopher · 13 years ago
  17. e3fd2a3 Temporarily revert r155364 until the upstream review can complete, per by Chandler Carruth · 13 years ago
  18. d410eab Revert r155365, r155366, and r155367. All three of these have regression by Chandler Carruth · 13 years ago
  19. 15e56ad Hexagon V5 (floating point) support. by Sirish Pande · 13 years ago
  20. 1bfd248 Support for Hexagon architectural feature, new value jump. by Sirish Pande · 13 years ago
  21. 0dac391 Support for Hexagon VLIW Packetizer. by Sirish Pande · 13 years ago
  22. 9f6852d Hexagon Packetizer's target independent fix. by Sirish Pande · 13 years ago
  23. 72847f3 Reapply r155136 after fixing PR12599. by Jakob Stoklund Olesen · 13 years ago
  24. 9dc06bd Conflict with st_dev/st_ino identifiers under Debian GNU/Hurd by Sylvestre Ledru · 13 years ago
  25. 55cabae Fix issue 67 by checking that the interface functions weren't redefined in the compiled source file. by Alexander Potapenko · 13 years ago
  26. 2d5fdf8 [tsan] use llvm/ADT/Statistic.h for tsan stats by Kostya Serebryany · 13 years ago
  27. 708e44f Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size. by Craig Topper · 13 years ago
  28. 9d35240 Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat. by Craig Topper · 13 years ago
  29. 69947b9 Tidy up by removing some 'else' after 'return' by Craig Topper · 13 years ago
  30. 1842ba0 Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen. by Craig Topper · 13 years ago
  31. 731dfd0 Add a couple llvm_unreachables. by Craig Topper · 13 years ago
  32. 0fbf364 Remove some tab characers. by Craig Topper · 13 years ago
  33. e8eb116 Remove some 'else' after 'return'. No functional change. by Craig Topper · 13 years ago
  34. a9963c6 Don't die with an assertion if the Result bitwidth is already correct. This by Chris Lattner · 13 years ago
  35. 85d043d Cleanup whitespace. by Bill Wendling · 13 years ago
  36. 098c595 Limit the number of times we recurse through this algorithm. All of the by Bill Wendling · 13 years ago
  37. b14940a Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode. by Craig Topper · 13 years ago
  38. 767b4f6 Convert getNode(UNDEF) to getUNDEF. by Craig Topper · 13 years ago
  39. df966f6 Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data(). by Craig Topper · 13 years ago
  40. d63fa65 Tidy up. 80 columns and argument alignment. by Craig Topper · 13 years ago
  41. 4c7972d Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs. by Craig Topper · 13 years ago
  42. dd90478 cleaned line endings in the newly added test file by Elena Demikhovsky · 13 years ago
  43. bfae1fd ARM: Initialize the HasRAS bit. by Benjamin Kramer · 13 years ago
  44. a3e3481 Tidy up this test more: by Chandler Carruth · 13 years ago
  45. 71f8bc3 FileCheck-ize a test, and tidy it up a touch. by Chandler Carruth · 13 years ago
  46. 1da5867 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2 by Elena Demikhovsky · 13 years ago
  47. eb23f9e Remove some potential warnings about variables used uninitialized. by Bill Wendling · 13 years ago
  48. d46575f Add a flag to the struct type finder to collect only those types which have by Bill Wendling · 13 years ago
  49. 2dbd784 No need for "else if" after a return. Autosense "0o123" as octal in by Chris Lattner · 13 years ago
  50. 5573876 stop hiding SmallVector's append that takes a count + element. by Chris Lattner · 13 years ago
  51. db34616 Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors. by Nadav Rotem · 13 years ago
  52. 9e401f2 Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number. by Craig Topper · 13 years ago
  53. d0cf565 Tidy up. 80 columns and some other spacing issues. by Craig Topper · 13 years ago
  54. 0b5ad0b Remove unused PointerLikeTypeTraits for IndexListEntry. by Benjamin Kramer · 13 years ago
  55. 89593935 llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC. by NAKAMURA Takumi · 13 years ago
  56. d2f16a2 HexagonISelLowering.cpp: Reorder #includes. by NAKAMURA Takumi · 13 years ago
  57. 4a80d64 CMake: Enable LLVM_COMPILER_JOBS on all MS IDEs. We don't support older environments than VS9. by NAKAMURA Takumi · 13 years ago
  58. 5bfe3bf CMake: Prune redundant LLVM_COMPILER_JOBS from llvm/CMakeLists.txt. HandleLLVMOptions.cmake has it. by NAKAMURA Takumi · 13 years ago
  59. e0af267 move Signals to .rodata by Nuno Lopes · 13 years ago
  60. d1ad82f HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts. by NAKAMURA Takumi · 13 years ago
  61. 2ddb845 YAMLParser: silence warning about tautological comparison on unsigned-char platforms. by Benjamin Kramer · 13 years ago
  62. f0ae38e Remove 'XXXRegisterClass' from tablegen output. Targets should use '&XXXRegClass' instead. by Craig Topper · 13 years ago
  63. 8e3c17a ARM: tblgen'erate more NEON two-operand aliases. by Jim Grosbach · 13 years ago
  64. 0b35c35 Fix PR12599. by Jakob Stoklund Olesen · 13 years ago
  65. d83c9ea ARM: tblgen'erate more NEON two-operand aliases. by Jim Grosbach · 13 years ago
  66. c827834 Revert r155241, which is causing some breakage. by Bill Wendling · 13 years ago
  67. 8c48e4f Make ISelPosition a local variable. by Jakob Stoklund Olesen · 13 years ago
  68. bc7d448 Register DAGUpdateListeners with SelectionDAG. by Jakob Stoklund Olesen · 13 years ago
  69. c61382b Extraneous semicolon. by Eric Christopher · 13 years ago
  70. 64c7af8 If we discover all of the named structs in a module, then don't bother to by Bill Wendling · 13 years ago
  71. 3429c75 Print <def,read-undef> to avoid confusion. by Jakob Stoklund Olesen · 13 years ago
  72. d06c2de Added TargetRegisterInfo::getRegPressureSetName. by Andrew Trick · 13 years ago
  73. 7c0903a TableGen'd RegPressure: Added getPressureSetName. by Andrew Trick · 13 years ago
  74. f4594a3 Modify the sh-bang to run out-of-the-box for FreeBSDes. by Bill Wendling · 13 years ago
  75. a30444a New and improved comment. by Andrew Trick · 13 years ago
  76. c0ccb8b SparseSet: Add support for key-derived indexes and arbitrary key types. by Andrew Trick · 13 years ago
  77. 918f38a misched: initialize BB by Andrew Trick · 13 years ago
  78. d4786e2 Allow converting MachineBasicBlock::iterator to const_iterator. by Andrew Trick · 13 years ago
  79. 1b0b45b [docs] Update version number. I suggest that at some point we make the by Michael J. Spencer · 13 years ago
  80. a9498a2 Fix broken internal link. by Joel Jones · 13 years ago
  81. b85b2d5 Kick off 3.2 cycle for LLVM trunk. by Benjamin Kramer · 13 years ago
  82. d8b3ed8 ARM: Update NEON assembly two-operand aliases. by Jim Grosbach · 13 years ago
  83. 7605b29 Add debugging hints for when bugpoint does not suffice, specifically for instcombine and TargetLowering by Joel Jones · 13 years ago
  84. 4f7f40d [docs] Update Makefile for images removal. by Daniel Dunbar · 13 years ago
  85. 34c53f3 LLVM docs no longer contain images, don't try to install them. by Benjamin Kramer · 13 years ago
  86. 2efd8ac Add documentation comment. by Jim Grosbach · 13 years ago
  87. 93282d2 Correct spelling, q.v. http://en.wikipedia.org/wiki/Bourne_shell by Joel Jones · 13 years ago
  88. 9111fc1 [docs] Remove spurious or unused images. by Daniel Dunbar · 13 years ago
  89. ee54010 Removes json-bench from the test dependencies. by Manuel Klimek · 13 years ago
  90. 413ca0d effectively back out my last change (r155190) by Gabor Greif · 13 years ago
  91. c77d678 fix obviously bogus (IMO) operand index of the load in asserts by Gabor Greif · 13 years ago
  92. 420761a Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. by Craig Topper · 13 years ago
  93. c909950 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. by Craig Topper · 13 years ago
  94. eece9dc Revert r155136 "Defer some shl transforms to DAGCombine." by Jakob Stoklund Olesen · 13 years ago
  95. 181b147 ARM some VFP tblgen'erated two-operand aliases. by Jim Grosbach · 13 years ago
  96. bfb3c5a Tidy up. Formatting. by Jim Grosbach · 13 years ago
  97. 2a22b69 ARM let TableGen handle a few two-operand aliases. by Jim Grosbach · 13 years ago
  98. c1922c7 TableGen support for auto-generating assembly two-operand aliases. by Jim Grosbach · 13 years ago
  99. dc21604 Put this expensive check below the less expensive ones. by Bill Wendling · 13 years ago
  100. f2ae346 When cross compiling, install a host version of llvm-config. <rdar://11187889> by Bob Wilson · 13 years ago