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e1e9366281a98cd06b61d5d7e136ce2b1a433ba6
e1e9366
SmallVector and SmallPtrSet allocations now power-of-two aligned.
by Jean-Luc Duprat
· 12 years ago
4991289
[docs] The STL "binary search" has a non-obvious name.
by Sean Silva
· 12 years ago
7d21a64
Exclude the X86/complex-fca.ll test at it probably wasn't supposed to work on Windows
by Timur Iskhodzhanov
· 12 years ago
3e9f3a0
Add clang.arc.used to ModuleHasARC so ARC always runs if said call is present in a module.
by Michael Gottesman
· 12 years ago
2a88555
Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
by Jyotsna Verma
· 12 years ago
2df938a
Use 12 as the magic number for our abbreviation data and our
by Eric Christopher
· 12 years ago
c126c32
Move the construction of the skeleton compile unit after the
by Eric Christopher
· 12 years ago
22313e5
move testcase into appropriate X86 subdirectory.
by Adrian Prantl
· 12 years ago
0882fd6
Implement FRINT lowering on PPC using frin
by Hal Finkel
· 12 years ago
5114226
[mips] Define a function which returns the GPR register class.
by Akira Hatanaka
· 12 years ago
bc4de7c
Fix TableGen subtarget-emitter to handle A9/Swift.
by Andrew Trick
· 12 years ago
71246fb
Build fixes for STLPort + GCC
by Matt Arsenault
· 12 years ago
7d4ff60
Fix loop style
by Matt Arsenault
· 12 years ago
f24caa4
Split the llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m testcase into a CFE and LLVM part.
by Adrian Prantl
· 12 years ago
74a4533
Remove the old CodePlacementOpt pass.
by Benjamin Kramer
· 12 years ago
975ee54
Fix a typo
by Nadav Rotem
· 12 years ago
65063fe
Hexagon: Disable DwarfUsesInlineInfoSection flag.
by Jyotsna Verma
· 12 years ago
f5d5c43
Add PPC FP rounding instructions fri[mnpz]
by Hal Finkel
· 12 years ago
ef484a3
Revert "Fix allocations of SmallVector and SmallPtrSet so they are more prone to"
by Rafael Espindola
· 12 years ago
6173309
Fix allocations of SmallVector and SmallPtrSet so they are more prone to
by Jean-Luc Duprat
· 12 years ago
ae07bf3
Removed trailing whitespace.
by Michael Gottesman
· 12 years ago
fda56e5
[mips] Change type of accumulator registers to Untyped. Add two more accumulator
by Akira Hatanaka
· 12 years ago
c713e99
[mips] Define overloaded versions of storeRegToStack and loadRegFromStack.
by Akira Hatanaka
· 12 years ago
8c0b9b0
[mips] Add parameter Alignment to MipsFrameLowering's constructor.
by Akira Hatanaka
· 12 years ago
1cbd401
Revert r178166. According to Howard, this code is actually ok.
by Dan Gohman
· 12 years ago
af7da5c
[Mips Assembler] Add support for OR macro with imediate opperand
by Jack Carter
· 12 years ago
c26392a
Add support of RDSEED defined in AVX2 extension
by Michael Liao
· 12 years ago
258d9b7
Enhance boolean simplification to handle 16-/64-bit RDRAND
by Michael Liao
· 12 years ago
816f6d0
Skip moving call address loading into callseq when targets prefer register indirect call.
by Michael Liao
· 12 years ago
d02e46b
Removed dead code from ObjCARCOpts relating to tracking objc_retainBlocks through the ARC Dataflow analysis. By the time we get to the ARC dataflow analysis, any objc_retainBlock calls are not optimizable.
by Michael Gottesman
· 12 years ago
7ae3bb8
[fast-isel] Add a preemptive fix for the case where we fail to materialize an
by Chad Rosier
· 12 years ago
94fcfaf
[Mips Assembler] Add alias definitions for jal
by Jack Carter
· 12 years ago
bad24f7
Add the X86 FMAs to the scheduling model.
by Nadav Rotem
· 12 years ago
f2a2806
Minor simplification.
by Bill Wendling
· 12 years ago
59af9d0
Add the Haswell machine model.
by Nadav Rotem
· 12 years ago
0b6a69d
Remove the unused port from the SandyBridge machine model
by Nadav Rotem
· 12 years ago
5a8386e
Add ADX CPUID detection
by Michael Liao
· 12 years ago
8e4cd40
These two are default in the constructor for MCAsmInfo.
by Eric Christopher
· 12 years ago
a46f82d
Make Win32 put the SRet address into EAX, fixes PR15556
by Timur Iskhodzhanov
· 12 years ago
af0d148
Specify CPUs on the PPC bswap-load-store test
by Hal Finkel
· 12 years ago
2544f22
Only enable 64-bit bswap DAG combines for PPC64
by Hal Finkel
· 12 years ago
3832eff
Non optimizable objc_retainBlock calls are not forwarding.
by Michael Gottesman
· 12 years ago
0d92a3c
[ObjCARC] Strength reduce objc_retainBlock -> objc_retain if the objc_retainBlock is optimizable.
by Michael Gottesman
· 12 years ago
810848d
Hexagon: Replace switch-case in isDotNewInst with TSFlags.
by Jyotsna Verma
· 12 years ago
b52980b
Fix bad indentation in r178276
by Hal Finkel
· 12 years ago
e41c7d4
Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.
by Jyotsna Verma
· 12 years ago
fc822ce
Remove -O3.
by Akira Hatanaka
· 12 years ago
53774a8
Use direct types in most PowerPC Altivec instructions and patterns.
by Bill Schmidt
· 12 years ago
efdd467
Add the PPC64 ldbrx/stdbrx instructions
by Hal Finkel
· 12 years ago
ce88835
Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when the upper bit is set.
by Gordon Keiser
· 12 years ago
93b1078
Testing commit access to llvm. Remove two lines of whitespace from the Thumb README.
by Gordon Keiser
· 12 years ago
7f5f06b
Correct spelling of Git.
by Thomas Schwinge
· 12 years ago
30509ee
Move test since it depends on the X86 backend.
by Rafael Espindola
· 12 years ago
4f2ef94
Hexagon: Use multiclass for gp-relative instructions.
by Jyotsna Verma
· 12 years ago
aab2305
Seciton 24.2.2 of the C++ standard, [iterator.iterators], Table 106
by Howard Hinnant
· 12 years ago
42a1b2f
AArch64: implement GICv3 system registers
by Tim Northover
· 12 years ago
c53ab4d
Add the PPC64 popcntd instruction
by Hal Finkel
· 12 years ago
f464481
[tsan] make sure memset/memcpy/memmove are not inlined in tsan mode
by Kostya Serebryany
· 12 years ago
21fb019
Revert "Updated ELF relocation test for .eh_frame section"
by Michael Gottesman
· 12 years ago
9f41d22
Disable JIT/MCJIT tests in unittests/ExecutionEngine for the targets that don't support JIT.
by Jyotsna Verma
· 12 years ago
d957f95
Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions
by Hal Finkel
· 12 years ago
d01efc7
Fix typo in PPCInstr64Bit
by Hal Finkel
· 12 years ago
72dfb05
Revert "Adding DIImportedModules to DIScopes."
by David Blaikie
· 12 years ago
d7216a2
Check if Type is a vector before calling function Type::getVectorNumElements.
by Akira Hatanaka
· 12 years ago
1fd36e4
This patch follows is a follow up to r178171, which uses the register
by Preston Gurd
· 12 years ago
c8d6536
Updated ELF relocation test for .eh_frame section
by Jack Carter
· 12 years ago
dd40e8c
[ms-inline asm] Add support of imm displacement before bracketed memory
by Chad Rosier
· 12 years ago
f25f93b
Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in PPCInstrInfo
by Hal Finkel
· 12 years ago
09d27fb
test file name change to correct typo
by Jack Carter
· 12 years ago
1edadea
by Preston Gurd
· 12 years ago
e915047
Fix typo (common to both X86 and PPC)
by Hal Finkel
· 12 years ago
fc80586
Remove more dead LR-as-GPR PPC code
by Hal Finkel
· 12 years ago
dcdc0fa
Avoid undefined behavior from passing a std::vector's own contents
by Dan Gohman
· 12 years ago
e77918c
Remove "gpr0 allocation" from the PPC README TODO list
by Hal Finkel
· 12 years ago
2b7f219
Don't try to generate crash diagnostics if we had an I/O failure. It's very
by Chad Rosier
· 12 years ago
ce94557
Add a boolean parameter to the llvm::report_fatal_error() function to indicated
by Chad Rosier
· 12 years ago
d99a29e
Specutively revert r178130.
by Bill Wendling
· 12 years ago
3545043
Fix comment
by David Blaikie
· 12 years ago
7fe65d6
Cleanup the simplify_type implementation.
by Rafael Espindola
· 12 years ago
00b3b5f
R600/SI: add SETO/SETUO patterns
by Christian Konig
· 12 years ago
2b393fb
Silence warning about mixing || in &&, fix up 80-cols.
by Benjamin Kramer
· 12 years ago
32e12df
Print PPC ZERO as 0 (not r0) even on Darwin
by Hal Finkel
· 12 years ago
fe37e62
Switch to LLVM support function abs64 to keep VS2008 happy.
by Tim Northover
· 12 years ago
f647052
Disable ASan/MSan symbolization of reports in tests.
by Evgeniy Stepanov
· 12 years ago
26998ee
Fix target-customized spilling in the register scavenger
by Hal Finkel
· 12 years ago
d6d0ebb
Disable Initialize.MultipleThreads test under MemorySanitizer.
by Evgeniy Stepanov
· 12 years ago
a210db7
Enabling the generation of dependency breakers for partial updates on Cortex-A15. Also fixing a small bug in getting the update clearence for VLD1LNd32.
by Silviu Baranga
· 12 years ago
0f68070
Hexagon: Disable optimizations at O0.
by Jyotsna Verma
· 12 years ago
cfe99ef
Improve performance of LinkModules when linking with modules with large numbers of functions which link lazily. Instead of creating and destroying function prototypes irrespective of if they are used, only create them if they are used.
by James Molloy
· 12 years ago
e492308
R600/SI: add cummuting of rev instructions
by Christian Konig
· 12 years ago
45b14e3
R600/SI: add mulhu/mulhs patterns
by Christian Konig
· 12 years ago
a62b1a1
R600/SI: add srl/sha patterns for SI
by Christian Konig
· 12 years ago
240b7f3
Allocate r0 on PPC
by Hal Finkel
· 12 years ago
6375e1b
Use the PPC no-r0 class on the TOC LD pseudos
by Hal Finkel
· 12 years ago
ab42ec2
Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudos
by Hal Finkel
· 12 years ago
56d926a
Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructions
by Hal Finkel
· 12 years ago
37ef805
Remove the link register from the GPR classes on PowerPC.
by Bill Schmidt
· 12 years ago
d841d6f
Added back in the test for arc-annotations.
by Michael Gottesman
· 12 years ago
342d92c
Adding DIImportedModules to DIScopes.
by David Blaikie
· 12 years ago
b7e11e4
Don't spill PPC VRSAVE on non-Darwin (even in SjLj)
by Hal Finkel
· 12 years ago
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