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review.blissroms.org / platform_external_llvm80 / e6204cf2f1990eb90e727e003e687ef5b84c8a75
  1. e6204cf [InstCombine] Improve Vector Demanded Bits Through Bitcasts by Simon Pilgrim · 10 years ago
  2. e2adff7 [WebAssembly] Rename test files to match platform naming conventions. by Dan Gohman · 10 years ago
  3. 573624b [LoopUnswitch] Add block frequency analysis to recognize hot/cold regions by Chen Li · 10 years ago
  4. 763aee2 [CMake] X86AsmParser: Prune redundant LINK_LIBS. by NAKAMURA Takumi · 10 years ago
  5. e0bc463 Move dbg.declare intrinsics when merging and replacing allocas. by Evgeniy Stepanov · 10 years ago
  6. 64ffcd4 RegisterPressure: LiveRegSet tracks register units not physregs by Matthias Braun · 10 years ago
  7. c181443 [WinEH] Fix ip2state table emission with funclets by Reid Kleckner · 10 years ago
  8. 7df7456 Fix unused variable warning in non-debug builds. by Richard Trieu · 10 years ago
  9. 7600822 tidy up comments; NFC by Sanjay Patel · 10 years ago
  10. 5a4293a add a FIXME for a CPU model check that should have an attribute instead by Sanjay Patel · 10 years ago
  11. cd0dcf8 move one-use check under the comment that describes it; NFCI by Sanjay Patel · 10 years ago
  12. 31d7440 [SCEV] Don't crash on pointer comparisons by Sanjoy Das · 10 years ago
  13. e706695 AMDGPU: Factor switch into separate function by Matt Arsenault · 10 years ago
  14. 3443ffa AMDGPU: Fix splitting x16 SMRD loads by Matt Arsenault · 10 years ago
  15. 33d8695 AMDGPU: Fix moving SMRD loads with literal offsets on CI by Matt Arsenault · 10 years ago
  16. 9ed2f31 AMDGPU: Fix splitting SMRD with large offset by Matt Arsenault · 10 years ago
  17. 445a12e AMDGPU: Add testcases by Matt Arsenault · 10 years ago
  18. ba19786 AMDGPU: Cleanup test by Matt Arsenault · 10 years ago
  19. aac3c94 Improved the interface of methods commuting operands, improved X86-FMA3 mem-folding&coalescing. by Andrew Kaylor · 10 years ago
  20. 79d4f39 [GlobalOpt] Sort members of llvm.used deterministically by Sean Silva · 10 years ago
  21. c4a5a9a Improve performance of SimplifyInstructionsInBlock by Fiona Glaser · 10 years ago
  22. 71e9912 [mips][p5600] Added P5600 processor and initial scheduler. by Daniel Sanders · 10 years ago
  23. be2b2c3 Introduce !align metadata for load instruction by Artur Pilipenko · 10 years ago
  24. 436ea79 [InstSimplify] Fold simple known implications to true by Philip Reames · 10 years ago
  25. 90d2c9d [LoopReroll] Ignore debug intrinsics by Weiming Zhao · 10 years ago
  26. ec9e44d [WebAssembly] Support for direct call and call_indirect. by Dan Gohman · 10 years ago
  27. 3b17c1c [mips] Handling of immediates bigger than 16 bits by Zoran Jovanovic · 10 years ago
  28. c0ae278 [ARM] Avoid redundant checks for isThumb1Only() after supportsTailCall() by Artyom Skrobov · 10 years ago
  29. 76dfa41 [DAGCombine] Fix getStoreMergeAndAliasCandidates's AA-enabled chain walking by Hal Finkel · 10 years ago
  30. 273cdae Remove 'const' from some ArrayRefs. ArrayRefs are already immutable. NFC by Craig Topper · 10 years ago
  31. 0adaaa3 AsmWriter: Print the argument names in declarations while debugging by Justin Bogner · 10 years ago
  32. 164cc1e Silence clang warning: variable ‘Status’ set but not used. by Yaron Keren · 10 years ago
  33. d8387ea [SCEV] identical instructions don't compute equal values by Sanjoy Das · 10 years ago
  34. fa2392d [InstCombine] fold zexts and constants into a phi (PR24766) by Sanjay Patel · 10 years ago
  35. 8a43b3f [EH] Create removeUnwindEdge utility by Joseph Tremoulet · 10 years ago
  36. 2b4fa2c [InstCombine] Removed unnecessary meta attributes. by Simon Pilgrim · 10 years ago
  37. 0ff0eb0 [llvm-mc-fuzzer] Fix -jobs option. by Daniel Sanders · 10 years ago
  38. 68dc5fa [BranchProbability] Manually round the floating point output. by Benjamin Kramer · 10 years ago
  39. 5775e77 AMDGPU: Remove hasPostISelHook from most instructions by Matt Arsenault · 10 years ago
  40. 4d6cb93 AMDGPU: Switch over reg class size instead of checking all super classes by Matt Arsenault · 10 years ago
  41. 0a8ee14 AMDGPU: Don't handle invalid reg classes in helper functions by Matt Arsenault · 10 years ago
  42. 1af10eb AMDGPU: address -Winconsistent-missing-override by Saleem Abdulrasool · 10 years ago
  43. 32c69da AMDGPU: Set CopyCost of register classes by Matt Arsenault · 10 years ago
  44. 9cc82f0 [Bug 24848] Use range metadata to constant fold comparisons between two values by Chen Li · 10 years ago
  45. c03102a AMDGPU: VOP3b definition cleanups by Matt Arsenault · 10 years ago
  46. 23663b8 AMDGPU: Fix sched model for VOP2b instructions by Matt Arsenault · 10 years ago
  47. 24b507c [WebAssembly] Rename several functions and types according to the new spec. by Dan Gohman · 10 years ago
  48. 8e43417 [ARM] Don't generate clrex for pre-v7 targets. by Ahmed Bougacha · 10 years ago
  49. fe14a33 [SCEV] Reapply 'Teach isLoopBackedgeGuardedByCond to exploit trip counts' by Sanjoy Das · 10 years ago
  50. f0841dc [SCEV] Reapply 'Exploit A < B => (A+K) < (B+K) when possible' by Sanjoy Das · 10 years ago
  51. a882dfa LivePhysRegs: Fix live-outs of return blocks by Matthias Braun · 10 years ago
  52. 358e408 [InstCombine] match De Morgan's Law hidden by zext ops (PR22723) by Sanjay Patel · 10 years ago
  53. fed6bd8 Use fixed-point representation for BranchProbability. by Cong Hou · 10 years ago
  54. 0146367 SelectionDAGDumper: Print simple operands inline. by Matthias Braun · 10 years ago
  55. 728cde2 AMDGPU: Construct new buffer instruction when moving SMRD by Matt Arsenault · 10 years ago
  56. 476be37 DAGCombiner: Check if store is volatile first by Matt Arsenault · 10 years ago
  57. 86ac1df TargetRegisterInfo: Introduce PrintLaneMask. by Matthias Braun · 10 years ago
  58. dfc5b65 TargetRegisterInfo: Add typedef unsigned LaneBitmask and use it where apropriate; NFC by Matthias Braun · 10 years ago
  59. f776100 merge vector stores into wider vector stores and fix AArch64 misaligned access TLI hook (PR21711) by Sanjay Patel · 10 years ago
  60. 7aa5b69 PrologueEpilogInserter: Fix missing live-ins when savepoint equals restorepoint by Matthias Braun · 10 years ago
  61. 1566e71 AMDGPU/SI: Use .hsatext section instead of .text for HSA by Tom Stellard · 10 years ago
  62. 68f9d1c MCAsmInfo: Allow targets to specify when the .section directive should be omitted by Tom Stellard · 10 years ago
  63. 63daa14 MachineBasicBlock: Factor out common code into isReturnBlock() by Matthias Braun · 10 years ago
  64. 34fd05d Revert two SCEV changes that caused test failures in clang. by Sanjoy Das · 10 years ago
  65. ec5f6e8 ADCE: Fix typo in file comment. NFC by Justin Bogner · 10 years ago
  66. 0a70893 PeepholeOptimizer: Remove redundant copies by Matt Arsenault · 10 years ago
  67. de51d0d Simplify code. NFC. by Chad Rosier · 10 years ago
  68. d8f2872 more space; NFC by Sanjay Patel · 10 years ago
  69. 9026ca1 [SCEV] Teach isLoopBackedgeGuardedByCond to exploit trip counts. by Sanjoy Das · 10 years ago
  70. f5a027d [SCEV] Extract helper function from isImpliedCond; NFC by Sanjoy Das · 10 years ago
  71. dab86b5 [SCEV] Exploit A < B => (A+K) < (B+K) when possible by Sanjoy Das · 10 years ago
  72. b10f8d4 AMDGPU: Add some more tests for literal operands by Matt Arsenault · 10 years ago
  73. b95c6df AMDGPU: Make getNamedOperandIdx declaration readonly by Matt Arsenault · 10 years ago
  74. a43aca4 [AArch64] Add support for generating pre- and post-index load/store pairs. by Chad Rosier · 10 years ago
  75. a481a61 AMDGPU: Disable some passes that are not meaningful by Matt Arsenault · 10 years ago
  76. 9225f01 AMDGPU: Handle i64->v2i32 loads/stores in PreprocessISelDAG by Matt Arsenault · 10 years ago
  77. 7a6a7f2 AMDGPU: Fix recomputing dominator tree unnecessarily by Matt Arsenault · 10 years ago
  78. 323c9fb AMDGPU: Re-justify workaround and fix worked around problem by Matt Arsenault · 10 years ago
  79. 7ba1878 AMDGPU: Don't create REG_SEQUENCE with SGPR dest and VGPR sources by Matt Arsenault · 10 years ago
  80. 88ba582 AMDGPU: Fix not adding exec to defs of cmpx instruction pseudos by Matt Arsenault · 10 years ago
  81. 4fc498f AMDGPU: Improve accuracy of instruction rates for VOPC by Matt Arsenault · 10 years ago
  82. 2b27648 [GlobalsAA] Teach GlobalsAA about nocapture by James Molloy · 10 years ago
  83. 054da58 ARM: make -Asserts,-Werror=unused-variable build happy by Saleem Abdulrasool · 10 years ago
  84. 64ed61c ARM: address WoA division limitation by Saleem Abdulrasool · 10 years ago
  85. 29c29e1 AMDGPU: Remove unused includes by Matt Arsenault · 10 years ago
  86. cfca9be [LangRef] Unbreak the docs Sphinx build. by Sanjoy Das · 10 years ago
  87. f70eb72 [Bitcode][Asm] Teach LLVM to read and write operand bundles. by Sanjoy Das · 10 years ago
  88. 5f57fe0 Restore test coverage for other than ELFOSABI_NONE by Ed Maste · 10 years ago
  89. 807d5e0 Fix typo by Matt Arsenault · 10 years ago
  90. 099f1dc [AArch64] Improve the readability of the ld/st optimization pass. NFC. by Chad Rosier · 10 years ago
  91. 5769b61 [X86][SSE2] Fix zero/any extension shuffles that don't start from the first element by Simon Pilgrim · 10 years ago
  92. 5c37d16 Use ELFOSABI_NONE instead of ELFOSABI_LINUX. by Rafael Espindola · 10 years ago
  93. d0edb1f7 AMDGPU: Add s_dcache_* instructions by Matt Arsenault · 10 years ago
  94. 1348e9d AMDGPU: Add cache invalidation instructions. by Matt Arsenault · 10 years ago
  95. a16e3ad AMDGPU: Run mubuf assembler test for CI by Matt Arsenault · 10 years ago
  96. 76d7ac2e [AArch64] The paired post-increment store instruction has an output register. by Chad Rosier · 10 years ago
  97. 5b674c0 [IR] Add operand bundles to CallInst and InvokeInst. by Sanjoy Das · 10 years ago
  98. c848236 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def by Artyom Skrobov · 10 years ago
  99. c10a184 dsymutil: Fix the condition to distinguish module imports form definitions. by Adrian Prantl · 10 years ago
  100. d44ba4a [ValueTracking] Teach isKnownNonZero a new trick by James Molloy · 10 years ago