Merge "hwc: Do not use fb handle in hwc_prepare"
diff --git a/libhwcomposer/hwc_mdpcomp.cpp b/libhwcomposer/hwc_mdpcomp.cpp
index a0b9646..431136e 100644
--- a/libhwcomposer/hwc_mdpcomp.cpp
+++ b/libhwcomposer/hwc_mdpcomp.cpp
@@ -586,6 +586,15 @@
ALOGD_IF(isDebug(), "%s: Unsupported layer in list",__FUNCTION__);
return false;
}
+
+ //For 8x26, if there is only one layer which needs scale for secondary
+ //while no scale for primary display, DMA pipe is occupied by primary.
+ //If need to fall back to GLES composition, virtual display lacks DMA
+ //pipe and error is reported.
+ if(qdutils::MDPVersion::getInstance().is8x26() &&
+ mDpy >= HWC_DISPLAY_EXTERNAL &&
+ qhwc::needsScaling(ctx, layer, mDpy))
+ return false;
}
mCurrentFrame.fbCount = 0;
mCurrentFrame.fbZ = -1;
diff --git a/libqdutils/cb_utils.cpp b/libqdutils/cb_utils.cpp
index bc7e5b1..d8eec2a 100644
--- a/libqdutils/cb_utils.cpp
+++ b/libqdutils/cb_utils.cpp
@@ -49,6 +49,10 @@
Region wormholeRegion(fbFrameRect);
for (uint32_t i = 0 ; i < last; i++) {
+ //TODO Work on using hwc clear instead of gpu for HWC_BLIT
+ //If layer is marked for HWC_BLIT clear is done by GPU
+ if(list->hwLayers[i].compositionType == HWC_BLIT)
+ return 0;
// need to take care only in per pixel blending.
// Restrict calculation only for copybit layers.
if((list->hwLayers[i].blending != HWC_BLENDING_NONE) ||
diff --git a/libqdutils/mdp_version.cpp b/libqdutils/mdp_version.cpp
index e12b319..b219cd5 100644
--- a/libqdutils/mdp_version.cpp
+++ b/libqdutils/mdp_version.cpp
@@ -244,32 +244,5 @@
return (mFeatures & MDP_BWC_EN);
}
-bool MDPVersion::is8x26() {
- // check for 8x26 variants
- // chip variants have same major number and minor numbers usually vary
- // for e.g., MDSS_MDP_HW_REV_101 is 0x10010000
- // 1001 - major number
- // 0000 - minor number
- // 8x26 v1 minor number is 0000
- // v2 minor number is 0001 etc..
- if( mMdpRev >= MDSS_MDP_HW_REV_101 && mMdpRev < MDSS_MDP_HW_REV_102) {
- return true;
- }
- return false;
-}
-
-bool MDPVersion::is8x74v2() {
- if( mMdpRev >= MDSS_MDP_HW_REV_102 && mMdpRev < MDSS_MDP_HW_REV_200) {
- return true;
- }
- return false;
-}
-
-bool MDPVersion::is8x92() {
- if( mMdpRev >= MDSS_MDP_HW_REV_200 && mMdpRev < MDSS_MDP_HW_REV_206) {
- return true;
- }
- return false;
-}
}; //namespace qdutils
diff --git a/libqdutils/mdp_version.h b/libqdutils/mdp_version.h
index fb7920e..60a2985 100644
--- a/libqdutils/mdp_version.h
+++ b/libqdutils/mdp_version.h
@@ -57,10 +57,20 @@
MDSS_V5 = 500,
};
+// chip variants have same major number and minor numbers usually vary
+// for e.g., MDSS_MDP_HW_REV_101 is 0x10010000
+// 1001 - major number
+// 0000 - minor number
+// 8x26 v1 minor number is 0000
+// v2 minor number is 0001 etc..
enum mdp_rev {
MDSS_MDP_HW_REV_100 = 0x10000000, //8974 v1
MDSS_MDP_HW_REV_101 = 0x10010000, //8x26
MDSS_MDP_HW_REV_102 = 0x10020000, //8974 v2
+ MDSS_MDP_HW_REV_103 = 0x10030000, //8084
+ MDSS_MDP_HW_REV_104 = 0x10040000, //Next version
+ MDSS_MDP_HW_REV_105 = 0x10050000, //Next version
+ MDSS_MDP_HW_REV_107 = 0x10070000, //Next version
MDSS_MDP_HW_REV_200 = 0x20000000, //8092
MDSS_MDP_HW_REV_206 = 0x20060000, //Future
};
@@ -108,13 +118,28 @@
bool supportsDecimation();
uint32_t getMaxMDPDownscale();
bool supportsBWC();
- bool is8x26();
- bool is8x74v2();
- bool is8x92();
int getLeftSplit() { return mSplit.left(); }
int getRightSplit() { return mSplit.right(); }
unsigned long getLowBw() { return mLowBw; }
unsigned long getHighBw() { return mHighBw; }
+
+ bool is8x26() {
+ return (mMdpRev >= MDSS_MDP_HW_REV_101 and
+ mMdpRev < MDSS_MDP_HW_REV_102);
+ }
+ bool is8x74v2() {
+ return (mMdpRev >= MDSS_MDP_HW_REV_102 and
+ mMdpRev < MDSS_MDP_HW_REV_103);
+ }
+ bool is8084() {
+ return (mMdpRev >= MDSS_MDP_HW_REV_103 and
+ mMdpRev < MDSS_MDP_HW_REV_104);
+ }
+ bool is8092() {
+ return (mMdpRev >= MDSS_MDP_HW_REV_200 and
+ mMdpRev < MDSS_MDP_HW_REV_206);
+ }
+
private:
bool updateSysFsInfo();
bool updatePanelInfo();