Lx Debug Logs Decoding Feature
diff --git a/halimpl/pn54x/hal/phNxpNciHal.c b/halimpl/pn54x/hal/phNxpNciHal.c
index e2bc885..33ab94d 100644
--- a/halimpl/pn54x/hal/phNxpNciHal.c
+++ b/halimpl/pn54x/hal/phNxpNciHal.c
@@ -27,6 +27,7 @@
#include <phNxpNciHal_NfcDepSWPrio.h>
#include <phNxpNciHal_Kovio.h>
#include <phTmlNfc_i2c.h>
+#include "phNxpNciHal_nciParser.h"
/*********************** Global Variables *************************************/
#define PN547C2_CLOCK_SETTING
#undef PN547C2_FACTORY_RESET_DEBUG
@@ -65,6 +66,7 @@
phNxpNci_getCfg_info_t* mGetCfg_info = NULL;
uint32_t gSvddSyncOff_Delay = 10;
bool_t force_fw_download_req = false;
+bool_t gParserCreated = FALSE;
/* global variable to get FW version from NCI response*/
uint32_t wFwVerRsp;
/* External global variable to get FW version */
@@ -115,6 +117,7 @@
static NFCSTATUS phNxpNciHal_set_Boot_Mode(uint8_t mode);
NFCSTATUS phNxpNciHal_check_clock_config(void);
NFCSTATUS phNxpNciHal_set_china_region_configs(void);
+static void phNxpNciHal_configLxDebug(void);
static NFCSTATUS phNxpNciHalRFConfigCmdRecSequence();
static NFCSTATUS phNxpNciHal_CheckRFCmdRespStatus();
int check_config_parameter();
@@ -500,6 +503,7 @@
uint8_t cmd_reset_nci[] = {0x20, 0x00, 0x01, 0x01};
/*NCI_INIT_CMD*/
uint8_t cmd_init_nci[] = {0x20, 0x01, 0x00};
+ static uint8_t cmd_lxdebug[] = { 0x20, 0x02, 0x06, 0x01, 0xA0, 0x1D, 0x02, 0x00, 0x00 };
uint8_t boot_mode = nxpncihal_ctrl.hal_boot_mode;
char* nfc_dev_node = NULL;
const uint16_t max_len = 260;
@@ -2203,6 +2207,8 @@
}
}
+ phNxpNciHal_configLxDebug();
+
retry_core_init_cnt = 0;
if (buffer) {
@@ -2705,9 +2711,15 @@
status =
phNxpNciHal_send_ext_cmd(sizeof(cmd_core_reset_nci), cmd_core_reset_nci);
+
if (status != NFCSTATUS_SUCCESS) {
NXPLOG_NCIHAL_E("NCI_CORE_RESET: Failed");
}
+
+ if(gParserCreated)
+ {
+ phNxpNciHal_deinitParser();
+ }
close_and_return:
if (NULL != gpphTmlNfc_Context->pDevHandle) {
@@ -3737,3 +3749,77 @@
return nxpncihal_ctrl.chipType;
}
+/*******************************************************************************
+**
+** Function phNxpNciHal_configLxDebug(void)
+**
+** Description Helper function to configure LxDebug modes
+**
+** Parameters none
+**
+** Returns void
+*******************************************************************************/
+void phNxpNciHal_configLxDebug(void)
+{
+ NFCSTATUS status = NFCSTATUS_SUCCESS;
+ unsigned long num = 0;
+ uint8_t isfound = 0;
+ static uint8_t cmd_lxdebug[] = { 0x20, 0x02, 0x06, 0x01, 0xA0, 0x1D, 0x02, 0x00, 0x00 };
+
+ isfound = GetNxpNumValue(NAME_NXP_CORE_PROP_SYSTEM_DEBUG, &num, sizeof(num));
+
+ if(isfound > 0)
+ {
+ if(num == 0x00)
+ {
+ ALOGD("Disable LxDebug");
+ }
+ else if(num == 0x01)
+ {
+ ALOGD("Enable L1 RF NTF debugs");
+ cmd_lxdebug[7] = 0x10;
+ }
+ else if(num == 0x02)
+ {
+ ALOGD("Enable L2 RF NTF debugs");
+ cmd_lxdebug[7] = 0x01;
+ }
+ else if(num == 0x03)
+ {
+ ALOGD("Enable L1 & L2 RF NTF debugs");
+ cmd_lxdebug[7] = 0x31;
+ }
+ else if(num == 0x04)
+ {
+ ALOGD("Enable L1 & L2 & RSSI NTF debugs");
+ cmd_lxdebug[7] = 0x31;
+ cmd_lxdebug[8] = 0x01;
+ }
+ else if(num == 0x05)
+ {
+ ALOGD("Enable L2 & Felica RF NTF debugs");
+ cmd_lxdebug[7] = 0x03;
+ }
+ else
+ ALOGE("Invalid Level, Disable LxDebug");
+
+ status = phNxpNciHal_send_ext_cmd(sizeof(cmd_lxdebug)/sizeof(cmd_lxdebug[0]),cmd_lxdebug);
+ if (status != NFCSTATUS_SUCCESS)
+ {
+ NXPLOG_NCIHAL_E("Set lxDebug config failed");
+ }
+ else {
+ // try initializing parser
+ if(!gParserCreated && (cmd_lxdebug[7] != 0x00))
+ gParserCreated = phNxpNciHal_initParser();
+
+ if(gParserCreated) {
+ phNxpNciHal_parsePacket(cmd_lxdebug,sizeof(cmd_lxdebug)/sizeof(cmd_lxdebug[0]));
+ NXPLOG_NCIHAL_D("Parser Initialized Successfully");
+ }
+ else {
+ NXPLOG_NCIHAL_E("Parser Not Available");
+ }
+ }
+ }
+}
diff --git a/halimpl/pn54x/hal/phNxpNciHal_ext.c b/halimpl/pn54x/hal/phNxpNciHal_ext.c
index c83bc68..f32699f 100644
--- a/halimpl/pn54x/hal/phNxpNciHal_ext.c
+++ b/halimpl/pn54x/hal/phNxpNciHal_ext.c
@@ -22,6 +22,7 @@
#include <phNxpLog.h>
#include <phNxpConfig.h>
#include <phDnldNfc.h>
+#include "phNxpNciHal_nciParser.h"
/* Timeout value to wait for response from PN548AD */
#define HAL_EXTNS_WRITE_RSP_TIMEOUT (2500)
@@ -51,6 +52,7 @@
extern uint32_t wFwVerRsp;
/* External global variable to get FW version from FW file*/
extern uint16_t wFwVer;
+extern bool_t gParserCreated;
uint16_t fw_maj_ver;
uint16_t rom_version;
/* local buffer to store CORE_INIT response */
@@ -108,6 +110,13 @@
NFCSTATUS status = NFCSTATUS_SUCCESS;
uint16_t rf_technology_length_param = 0;
+ /*parse and decode LxDebug Notifications*/
+ if(p_ntf[0] == 0x6F && (p_ntf[1] == 0x35 || p_ntf[1] == 0x36))
+ {
+ if(gParserCreated)
+ phNxpNciHal_parsePacket(p_ntf,*p_len);
+ }
+
if (p_ntf[0] == 0x61 && p_ntf[1] == 0x05 && p_ntf[4] == 0x03 &&
p_ntf[5] == 0x05 && nxpprofile_ctrl.profile_type == EMV_CO_PROFILE) {
p_ntf[4] = 0xFF;
diff --git a/halimpl/pn54x/libnfc-nxp-PN80T_example.conf b/halimpl/pn54x/libnfc-nxp-PN80T_example.conf
index e620747..51a6162 100644
--- a/halimpl/pn54x/libnfc-nxp-PN80T_example.conf
+++ b/halimpl/pn54x/libnfc-nxp-PN80T_example.conf
@@ -85,7 +85,6 @@
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
-
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
@@ -355,6 +354,18 @@
NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###############################################################################
+#This config will enable different level of Rf transaction debugs based on the
+#following values provided. Decoded information will be printed in adb logcat
+#Debug Mode Levels
+#Disable Debug 0x00
+#L1 Debug 0x01
+#L2 Debug 0x02
+#L1 & L2 Debug 0x03
+#L1 & L2 & RSSI 0x04
+#L1 & L2 & Felica 0x05
+NXP_CORE_PROP_SYSTEM_DEBUG=0x00
+
+###############################################################################
# Wired mode resume timeout vaule in wired mode resume feature enable
# DWP resume time out in ms( 4 bytes hex value and LSB first)
#example 1000 = 0x03E8
diff --git a/halimpl/pn54x/utils/phNxpConfig.h b/halimpl/pn54x/utils/phNxpConfig.h
index 18a8b95..b7cafe3 100644
--- a/halimpl/pn54x/utils/phNxpConfig.h
+++ b/halimpl/pn54x/utils/phNxpConfig.h
@@ -106,5 +106,6 @@
#define NAME_NXP_UICC_LISTEN_TECH_MASK "UICC_LISTEN_TECH_MASK"
#define NAME_NXP_HOST_LISTEN_TECH_MASK "HOST_LISTEN_TECH_MASK"
#define NAME_NXP_SVDD_SYNC_OFF_DELAY "NXP_SVDD_SYNC_OFF_DELAY"
+#define NAME_NXP_CORE_PROP_SYSTEM_DEBUG "NXP_CORE_PROP_SYSTEM_DEBUG"
#endif