commit b25c3f6a86dc634ce44fb2849385b49465caa84d
author Elliott Hughes <enh@google.com> Mon Mar 26 16:35:06 2012 -0700
committer Elliott Hughes <enh@google.com> Mon Mar 26 17:11:59 2012 -0700
tree f359c72d821d913f78b977d8dde0fc7023afb511
parent fc9e6fabed89d948fa8c0e9d673e430076712c60

Fix cpplint's whitespace complaints.

Change-Id: I11fd2db2badf7bd98e7866ca2155d8ef1e112408

src/compiler/codegen/mips/ArchUtility.cc

diff --git a/src/compiler/codegen/mips/ArchUtility.cc b/src/compiler/codegen/mips/ArchUtility.cc
index 40188ce..4252d50 100644
--- a/src/compiler/codegen/mips/ArchUtility.cc
+++ b/src/compiler/codegen/mips/ArchUtility.cc
@@ -54,7 +54,7 @@
                DCHECK_LT(fmt, fmtEnd);
                DCHECK_LT((unsigned)(nc-'0'), 4u);
                operand = lir->operands[nc-'0'];
-               switch(*fmt++) {
+               switch (*fmt++) {
                    case 'b':
                        strcpy(tbuf,"0000");
                        for (i=3; i>= 0; i--) {

src/compiler/codegen/mips/Assemble.cc

diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc
index 07a9975..1d629be 100644
--- a/src/compiler/codegen/mips/Assemble.cc
+++ b/src/compiler/codegen/mips/Assemble.cc
@@ -467,7 +467,7 @@
     bool unconditional = false;
     int opcode = lir->opcode;
     int dalvikOffset = lir->dalvikOffset;
-    switch(opcode) {
+    switch (opcode) {
         case kMipsBal:
             LOG(FATAL) << "long branch and link unsupported";
         case kMipsB:
@@ -656,7 +656,7 @@
             u4 operand;
             u4 value;
             operand = lir->operands[i];
-            switch(encoder->fieldLoc[i].kind) {
+            switch (encoder->fieldLoc[i].kind) {
                 case kFmtUnused:
                     break;
                 case kFmtBitBlt:

src/compiler/codegen/mips/FP/MipsFP.cc

diff --git a/src/compiler/codegen/mips/FP/MipsFP.cc b/src/compiler/codegen/mips/FP/MipsFP.cc
index d8ca0a1..6524641 100644
--- a/src/compiler/codegen/mips/FP/MipsFP.cc
+++ b/src/compiler/codegen/mips/FP/MipsFP.cc
@@ -189,7 +189,7 @@
     bool wide = true;
     int offset;
 
-    switch(mir->dalvikInsn.opcode) {
+    switch (mir->dalvikInsn.opcode) {
         case Instruction::CMPL_FLOAT:
             offset = OFFSETOF_MEMBER(Thread, pCmplFloat);
             wide = false;

src/compiler/codegen/mips/Mips32/Factory.cc

diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc
index 0ee936e..1162702 100644
--- a/src/compiler/codegen/mips/Mips32/Factory.cc
+++ b/src/compiler/codegen/mips/Mips32/Factory.cc
@@ -235,7 +235,7 @@
     MipsOpCode opcode = kMipsNop;
     bool shortForm = true;
 
-    switch(op) {
+    switch (op) {
         case kOpAdd:
             if (IS_SIMM16(value)) {
                 opcode = kMipsAddiu;

src/compiler/codegen/mips/Mips32/Gen.cc

diff --git a/src/compiler/codegen/mips/Mips32/Gen.cc b/src/compiler/codegen/mips/Mips32/Gen.cc
index 4530517..bf65ba6 100644
--- a/src/compiler/codegen/mips/Mips32/Gen.cc
+++ b/src/compiler/codegen/mips/Mips32/Gen.cc
@@ -357,7 +357,7 @@
     MipsOpCode brOp;
     bool cmpZero = false;
     bool swapped = false;
-    switch(cond) {
+    switch (cond) {
         case kCondEq:
             brOp = kMipsBeq;
             cmpZero = true;
@@ -430,7 +430,7 @@
         return branch;
     }
     MipsOpCode opc;
-    switch(cond) {
+    switch (cond) {
         case kCondEq: opc = kMipsBeqz; break;
         case kCondGe: opc = kMipsBgez; break;
         case kCondGt: opc = kMipsBgtz; break;