C++'ification of Quick compiler's casts
o Eliminate old useless LIR casts.
o Replace remaining C-style casts with new C++ versions.
o Unified instruction encoding enum
o Expand usage of the auto-generated ostream helpers for enum LOG messages.
o Replaced all usages of intptr_t with uintptr_t.
o Fixed bug in removeRedundantBranches, and moved to common code
Change-Id: I53211c0de1be913f958c8fde915296ac08345b7e
diff --git a/src/compiler/codegen/x86/assemble_x86.cc b/src/compiler/codegen/x86/assemble_x86.cc
index 63d2b83..0c2ff0d 100644
--- a/src/compiler/codegen/x86/assemble_x86.cc
+++ b/src/compiler/codegen/x86/assemble_x86.cc
@@ -557,7 +557,7 @@
reg = reg & X86_FP_REG_MASK;
}
if (reg >= 4) {
- DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+ DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
<< " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
}
DCHECK_LT(reg, 8);
@@ -614,7 +614,7 @@
reg = reg & X86_FP_REG_MASK;
}
if (reg >= 4) {
- DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+ DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
<< " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
}
DCHECK_LT(reg, 8);
@@ -705,7 +705,7 @@
reg = reg & X86_FP_REG_MASK;
}
if (reg >= 4) {
- DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+ DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
<< " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
}
DCHECK_LT(reg, 8);
@@ -958,7 +958,7 @@
DCHECK_EQ(0, entry->skeleton.extra_opcode2);
}
if (reg >= 4) {
- DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+ DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
<< " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
}
DCHECK_LT(reg, 8);
@@ -1118,11 +1118,11 @@
int base_or_table, uint8_t index, int scale, int table_or_disp) {
int disp;
if (entry->opcode == kX86PcRelLoadRA) {
- SwitchTable *tabRec = (SwitchTable*)table_or_disp;
+ SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(table_or_disp);
disp = tabRec->offset;
} else {
DCHECK(entry->opcode == kX86PcRelAdr);
- FillArrayData *tabRec = (FillArrayData *)base_or_table;
+ FillArrayData *tabRec = reinterpret_cast<FillArrayData*>(base_or_table);
disp = tabRec->offset;
}
if (entry->skeleton.prefix1 != 0) {
@@ -1189,12 +1189,12 @@
* instruction. In those cases we will try to substitute a new code
* sequence or request that the trace be shortened and retried.
*/
-AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAddr) {
+AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, uintptr_t startAddr) {
LIR *lir;
AssemblerStatus res = kSuccess; // Assume success
const bool kVerbosePcFixup = false;
- for (lir = (LIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
+ for (lir = cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
if (lir->opcode < 0) {
continue;
}
@@ -1209,13 +1209,13 @@
LIR *targetLIR = lir->target;
DCHECK(targetLIR != NULL);
int delta = 0;
- intptr_t pc;
+ uintptr_t pc;
if (IS_SIMM8(lir->operands[0])) {
pc = lir->offset + 2 /* opcode + rel8 */;
} else {
pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
}
- intptr_t target = targetLIR->offset;
+ uintptr_t target = targetLIR->offset;
delta = target - pc;
if (IS_SIMM8(delta) != IS_SIMM8(lir->operands[0])) {
if (kVerbosePcFixup) {
@@ -1239,8 +1239,8 @@
case kX86Jcc32: {
LIR *targetLIR = lir->target;
DCHECK(targetLIR != NULL);
- intptr_t pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
- intptr_t target = targetLIR->offset;
+ uintptr_t pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
+ uintptr_t target = targetLIR->offset;
int delta = target - pc;
if (kVerbosePcFixup) {
LOG(INFO) << "Source:";
@@ -1256,13 +1256,13 @@
LIR *targetLIR = lir->target;
DCHECK(targetLIR != NULL);
int delta = 0;
- intptr_t pc;
+ uintptr_t pc;
if (IS_SIMM8(lir->operands[0])) {
pc = lir->offset + 2 /* opcode + rel8 */;
} else {
pc = lir->offset + 5 /* opcode + rel32 */;
}
- intptr_t target = targetLIR->offset;
+ uintptr_t target = targetLIR->offset;
delta = target - pc;
if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && delta == 0) {
// Useless branch
@@ -1285,8 +1285,8 @@
case kX86Jmp32: {
LIR *targetLIR = lir->target;
DCHECK(targetLIR != NULL);
- intptr_t pc = lir->offset + 5 /* opcode + rel32 */;
- intptr_t target = targetLIR->offset;
+ uintptr_t pc = lir->offset + 5 /* opcode + rel32 */;
+ uintptr_t target = targetLIR->offset;
int delta = target - pc;
lir->operands[0] = delta;
break;
@@ -1423,9 +1423,7 @@
LIR* x86LIR;
int offset = 0;
- for (x86LIR = (LIR *) cUnit->firstLIRInsn;
- x86LIR;
- x86LIR = NEXT_LIR(x86LIR)) {
+ for (x86LIR = cUnit->firstLIRInsn; x86LIR; x86LIR = NEXT_LIR(x86LIR)) {
x86LIR->offset = offset;
if (x86LIR->opcode >= 0) {
if (!x86LIR->flags.isNop) {