blob: 52e2cbec34d34ad4b72428beccc9952e1c42b3ce [file] [log] [blame]
Chris Larsen3039e382015-08-26 07:54:08 -07001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "intrinsics_mips64.h"
18
19#include "arch/mips64/instruction_set_features_mips64.h"
20#include "art_method.h"
21#include "code_generator_mips64.h"
22#include "entrypoints/quick/quick_entrypoints.h"
23#include "intrinsics.h"
24#include "mirror/array-inl.h"
25#include "mirror/string.h"
26#include "thread.h"
27#include "utils/mips64/assembler_mips64.h"
28#include "utils/mips64/constants_mips64.h"
29
30namespace art {
31
32namespace mips64 {
33
34IntrinsicLocationsBuilderMIPS64::IntrinsicLocationsBuilderMIPS64(CodeGeneratorMIPS64* codegen)
35 : arena_(codegen->GetGraph()->GetArena()) {
36}
37
38Mips64Assembler* IntrinsicCodeGeneratorMIPS64::GetAssembler() {
39 return reinterpret_cast<Mips64Assembler*>(codegen_->GetAssembler());
40}
41
42ArenaAllocator* IntrinsicCodeGeneratorMIPS64::GetAllocator() {
43 return codegen_->GetGraph()->GetArena();
44}
45
46bool IntrinsicLocationsBuilderMIPS64::TryDispatch(HInvoke* invoke) {
47 Dispatch(invoke);
48 LocationSummary* res = invoke->GetLocations();
49 return res != nullptr && res->Intrinsified();
50}
51
52#define __ assembler->
53
54static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
55 LocationSummary* locations = new (arena) LocationSummary(invoke,
56 LocationSummary::kNoCall,
57 kIntrinsified);
58 locations->SetInAt(0, Location::RequiresFpuRegister());
59 locations->SetOut(Location::RequiresRegister());
60}
61
62static void MoveFPToInt(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) {
63 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
64 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
65
66 if (is64bit) {
67 __ Dmfc1(out, in);
68 } else {
69 __ Mfc1(out, in);
70 }
71}
72
73// long java.lang.Double.doubleToRawLongBits(double)
74void IntrinsicLocationsBuilderMIPS64::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
75 CreateFPToIntLocations(arena_, invoke);
76}
77
78void IntrinsicCodeGeneratorMIPS64::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
79 MoveFPToInt(invoke->GetLocations(), true, GetAssembler());
80}
81
82// int java.lang.Float.floatToRawIntBits(float)
83void IntrinsicLocationsBuilderMIPS64::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
84 CreateFPToIntLocations(arena_, invoke);
85}
86
87void IntrinsicCodeGeneratorMIPS64::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
88 MoveFPToInt(invoke->GetLocations(), false, GetAssembler());
89}
90
91static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
92 LocationSummary* locations = new (arena) LocationSummary(invoke,
93 LocationSummary::kNoCall,
94 kIntrinsified);
95 locations->SetInAt(0, Location::RequiresRegister());
96 locations->SetOut(Location::RequiresFpuRegister());
97}
98
99static void MoveIntToFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) {
100 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
101 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
102
103 if (is64bit) {
104 __ Dmtc1(in, out);
105 } else {
106 __ Mtc1(in, out);
107 }
108}
109
110// double java.lang.Double.longBitsToDouble(long)
111void IntrinsicLocationsBuilderMIPS64::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
112 CreateIntToFPLocations(arena_, invoke);
113}
114
115void IntrinsicCodeGeneratorMIPS64::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
116 MoveIntToFP(invoke->GetLocations(), true, GetAssembler());
117}
118
119// float java.lang.Float.intBitsToFloat(int)
120void IntrinsicLocationsBuilderMIPS64::VisitFloatIntBitsToFloat(HInvoke* invoke) {
121 CreateIntToFPLocations(arena_, invoke);
122}
123
124void IntrinsicCodeGeneratorMIPS64::VisitFloatIntBitsToFloat(HInvoke* invoke) {
125 MoveIntToFP(invoke->GetLocations(), false, GetAssembler());
126}
127
128static void CreateIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
129 LocationSummary* locations = new (arena) LocationSummary(invoke,
130 LocationSummary::kNoCall,
131 kIntrinsified);
132 locations->SetInAt(0, Location::RequiresRegister());
133 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
134}
135
136static void GenReverseBytes(LocationSummary* locations,
137 Primitive::Type type,
138 Mips64Assembler* assembler) {
139 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
140 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
141
142 switch (type) {
143 case Primitive::kPrimShort:
144 __ Dsbh(out, in);
145 __ Seh(out, out);
146 break;
147 case Primitive::kPrimInt:
148 __ Rotr(out, in, 16);
149 __ Wsbh(out, out);
150 break;
151 case Primitive::kPrimLong:
152 __ Dsbh(out, in);
153 __ Dshd(out, out);
154 break;
155 default:
156 LOG(FATAL) << "Unexpected size for reverse-bytes: " << type;
157 UNREACHABLE();
158 }
159}
160
161// int java.lang.Integer.reverseBytes(int)
162void IntrinsicLocationsBuilderMIPS64::VisitIntegerReverseBytes(HInvoke* invoke) {
163 CreateIntToIntLocations(arena_, invoke);
164}
165
166void IntrinsicCodeGeneratorMIPS64::VisitIntegerReverseBytes(HInvoke* invoke) {
167 GenReverseBytes(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
168}
169
170// long java.lang.Long.reverseBytes(long)
171void IntrinsicLocationsBuilderMIPS64::VisitLongReverseBytes(HInvoke* invoke) {
172 CreateIntToIntLocations(arena_, invoke);
173}
174
175void IntrinsicCodeGeneratorMIPS64::VisitLongReverseBytes(HInvoke* invoke) {
176 GenReverseBytes(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
177}
178
179// short java.lang.Short.reverseBytes(short)
180void IntrinsicLocationsBuilderMIPS64::VisitShortReverseBytes(HInvoke* invoke) {
181 CreateIntToIntLocations(arena_, invoke);
182}
183
184void IntrinsicCodeGeneratorMIPS64::VisitShortReverseBytes(HInvoke* invoke) {
185 GenReverseBytes(invoke->GetLocations(), Primitive::kPrimShort, GetAssembler());
186}
187
188static void GenCountZeroes(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) {
189 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
190 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
191
192 if (is64bit) {
193 __ Dclz(out, in);
194 } else {
195 __ Clz(out, in);
196 }
197}
198
199// int java.lang.Integer.numberOfLeadingZeros(int i)
200void IntrinsicLocationsBuilderMIPS64::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
201 CreateIntToIntLocations(arena_, invoke);
202}
203
204void IntrinsicCodeGeneratorMIPS64::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
205 GenCountZeroes(invoke->GetLocations(), false, GetAssembler());
206}
207
208// int java.lang.Long.numberOfLeadingZeros(long i)
209void IntrinsicLocationsBuilderMIPS64::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
210 CreateIntToIntLocations(arena_, invoke);
211}
212
213void IntrinsicCodeGeneratorMIPS64::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
214 GenCountZeroes(invoke->GetLocations(), true, GetAssembler());
215}
216
217static void GenReverse(LocationSummary* locations,
218 Primitive::Type type,
219 Mips64Assembler* assembler) {
220 DCHECK(type == Primitive::kPrimInt || type == Primitive::kPrimLong);
221
222 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
223 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
224
225 if (type == Primitive::kPrimInt) {
226 __ Rotr(out, in, 16);
227 __ Wsbh(out, out);
228 __ Bitswap(out, out);
229 } else {
230 __ Dsbh(out, in);
231 __ Dshd(out, out);
232 __ Dbitswap(out, out);
233 }
234}
235
236// int java.lang.Integer.reverse(int)
237void IntrinsicLocationsBuilderMIPS64::VisitIntegerReverse(HInvoke* invoke) {
238 CreateIntToIntLocations(arena_, invoke);
239}
240
241void IntrinsicCodeGeneratorMIPS64::VisitIntegerReverse(HInvoke* invoke) {
242 GenReverse(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
243}
244
245// long java.lang.Long.reverse(long)
246void IntrinsicLocationsBuilderMIPS64::VisitLongReverse(HInvoke* invoke) {
247 CreateIntToIntLocations(arena_, invoke);
248}
249
250void IntrinsicCodeGeneratorMIPS64::VisitLongReverse(HInvoke* invoke) {
251 GenReverse(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
252}
253
Chris Larsen0b7ac982015-09-04 12:54:28 -0700254static void CreateFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
255 LocationSummary* locations = new (arena) LocationSummary(invoke,
256 LocationSummary::kNoCall,
257 kIntrinsified);
258 locations->SetInAt(0, Location::RequiresFpuRegister());
259 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
260}
261
262static void MathAbsFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) {
263 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
264 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
265
266 if (is64bit) {
267 __ AbsD(out, in);
268 } else {
269 __ AbsS(out, in);
270 }
271}
272
273// double java.lang.Math.abs(double)
274void IntrinsicLocationsBuilderMIPS64::VisitMathAbsDouble(HInvoke* invoke) {
275 CreateFPToFPLocations(arena_, invoke);
276}
277
278void IntrinsicCodeGeneratorMIPS64::VisitMathAbsDouble(HInvoke* invoke) {
279 MathAbsFP(invoke->GetLocations(), true, GetAssembler());
280}
281
282// float java.lang.Math.abs(float)
283void IntrinsicLocationsBuilderMIPS64::VisitMathAbsFloat(HInvoke* invoke) {
284 CreateFPToFPLocations(arena_, invoke);
285}
286
287void IntrinsicCodeGeneratorMIPS64::VisitMathAbsFloat(HInvoke* invoke) {
288 MathAbsFP(invoke->GetLocations(), false, GetAssembler());
289}
290
291static void CreateIntToInt(ArenaAllocator* arena, HInvoke* invoke) {
292 LocationSummary* locations = new (arena) LocationSummary(invoke,
293 LocationSummary::kNoCall,
294 kIntrinsified);
295 locations->SetInAt(0, Location::RequiresRegister());
296 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
297}
298
299static void GenAbsInteger(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) {
300 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
301 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
302
303 if (is64bit) {
304 __ Dsra32(AT, in, 31);
305 __ Xor(out, in, AT);
306 __ Dsubu(out, out, AT);
307 } else {
308 __ Sra(AT, in, 31);
309 __ Xor(out, in, AT);
310 __ Subu(out, out, AT);
311 }
312}
313
314// int java.lang.Math.abs(int)
315void IntrinsicLocationsBuilderMIPS64::VisitMathAbsInt(HInvoke* invoke) {
316 CreateIntToInt(arena_, invoke);
317}
318
319void IntrinsicCodeGeneratorMIPS64::VisitMathAbsInt(HInvoke* invoke) {
320 GenAbsInteger(invoke->GetLocations(), false, GetAssembler());
321}
322
323// long java.lang.Math.abs(long)
324void IntrinsicLocationsBuilderMIPS64::VisitMathAbsLong(HInvoke* invoke) {
325 CreateIntToInt(arena_, invoke);
326}
327
328void IntrinsicCodeGeneratorMIPS64::VisitMathAbsLong(HInvoke* invoke) {
329 GenAbsInteger(invoke->GetLocations(), true, GetAssembler());
330}
331
332static void GenMinMaxFP(LocationSummary* locations,
333 bool is_min,
334 bool is_double,
335 Mips64Assembler* assembler) {
336 FpuRegister lhs = locations->InAt(0).AsFpuRegister<FpuRegister>();
337 FpuRegister rhs = locations->InAt(1).AsFpuRegister<FpuRegister>();
338 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
339
340 if (is_double) {
341 if (is_min) {
342 __ MinD(out, lhs, rhs);
343 } else {
344 __ MaxD(out, lhs, rhs);
345 }
346 } else {
347 if (is_min) {
348 __ MinS(out, lhs, rhs);
349 } else {
350 __ MaxS(out, lhs, rhs);
351 }
352 }
353}
354
355static void CreateFPFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
356 LocationSummary* locations = new (arena) LocationSummary(invoke,
357 LocationSummary::kNoCall,
358 kIntrinsified);
359 locations->SetInAt(0, Location::RequiresFpuRegister());
360 locations->SetInAt(1, Location::RequiresFpuRegister());
361 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
362}
363
364// double java.lang.Math.min(double, double)
365void IntrinsicLocationsBuilderMIPS64::VisitMathMinDoubleDouble(HInvoke* invoke) {
366 CreateFPFPToFPLocations(arena_, invoke);
367}
368
369void IntrinsicCodeGeneratorMIPS64::VisitMathMinDoubleDouble(HInvoke* invoke) {
370 GenMinMaxFP(invoke->GetLocations(), true, true, GetAssembler());
371}
372
373// float java.lang.Math.min(float, float)
374void IntrinsicLocationsBuilderMIPS64::VisitMathMinFloatFloat(HInvoke* invoke) {
375 CreateFPFPToFPLocations(arena_, invoke);
376}
377
378void IntrinsicCodeGeneratorMIPS64::VisitMathMinFloatFloat(HInvoke* invoke) {
379 GenMinMaxFP(invoke->GetLocations(), true, false, GetAssembler());
380}
381
382// double java.lang.Math.max(double, double)
383void IntrinsicLocationsBuilderMIPS64::VisitMathMaxDoubleDouble(HInvoke* invoke) {
384 CreateFPFPToFPLocations(arena_, invoke);
385}
386
387void IntrinsicCodeGeneratorMIPS64::VisitMathMaxDoubleDouble(HInvoke* invoke) {
388 GenMinMaxFP(invoke->GetLocations(), false, true, GetAssembler());
389}
390
391// float java.lang.Math.max(float, float)
392void IntrinsicLocationsBuilderMIPS64::VisitMathMaxFloatFloat(HInvoke* invoke) {
393 CreateFPFPToFPLocations(arena_, invoke);
394}
395
396void IntrinsicCodeGeneratorMIPS64::VisitMathMaxFloatFloat(HInvoke* invoke) {
397 GenMinMaxFP(invoke->GetLocations(), false, false, GetAssembler());
398}
399
400static void GenMinMax(LocationSummary* locations,
401 bool is_min,
402 Mips64Assembler* assembler) {
403 GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>();
404 GpuRegister rhs = locations->InAt(1).AsRegister<GpuRegister>();
405 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
406
407 if (out == lhs) {
408 __ Slt(AT, rhs, lhs);
409 if (is_min) {
410 __ Seleqz(out, lhs, AT);
411 __ Selnez(AT, rhs, AT);
412 } else {
413 __ Selnez(out, lhs, AT);
414 __ Seleqz(AT, rhs, AT);
415 }
416 } else {
417 __ Slt(AT, lhs, rhs);
418 if (is_min) {
419 __ Seleqz(out, rhs, AT);
420 __ Selnez(AT, lhs, AT);
421 } else {
422 __ Selnez(out, rhs, AT);
423 __ Seleqz(AT, lhs, AT);
424 }
425 }
426 __ Or(out, out, AT);
427}
428
429static void CreateIntIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
430 LocationSummary* locations = new (arena) LocationSummary(invoke,
431 LocationSummary::kNoCall,
432 kIntrinsified);
433 locations->SetInAt(0, Location::RequiresRegister());
434 locations->SetInAt(1, Location::RequiresRegister());
435 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
436}
437
438// int java.lang.Math.min(int, int)
439void IntrinsicLocationsBuilderMIPS64::VisitMathMinIntInt(HInvoke* invoke) {
440 CreateIntIntToIntLocations(arena_, invoke);
441}
442
443void IntrinsicCodeGeneratorMIPS64::VisitMathMinIntInt(HInvoke* invoke) {
444 GenMinMax(invoke->GetLocations(), true, GetAssembler());
445}
446
447// long java.lang.Math.min(long, long)
448void IntrinsicLocationsBuilderMIPS64::VisitMathMinLongLong(HInvoke* invoke) {
449 CreateIntIntToIntLocations(arena_, invoke);
450}
451
452void IntrinsicCodeGeneratorMIPS64::VisitMathMinLongLong(HInvoke* invoke) {
453 GenMinMax(invoke->GetLocations(), true, GetAssembler());
454}
455
456// int java.lang.Math.max(int, int)
457void IntrinsicLocationsBuilderMIPS64::VisitMathMaxIntInt(HInvoke* invoke) {
458 CreateIntIntToIntLocations(arena_, invoke);
459}
460
461void IntrinsicCodeGeneratorMIPS64::VisitMathMaxIntInt(HInvoke* invoke) {
462 GenMinMax(invoke->GetLocations(), false, GetAssembler());
463}
464
465// long java.lang.Math.max(long, long)
466void IntrinsicLocationsBuilderMIPS64::VisitMathMaxLongLong(HInvoke* invoke) {
467 CreateIntIntToIntLocations(arena_, invoke);
468}
469
470void IntrinsicCodeGeneratorMIPS64::VisitMathMaxLongLong(HInvoke* invoke) {
471 GenMinMax(invoke->GetLocations(), false, GetAssembler());
472}
473
474// double java.lang.Math.sqrt(double)
475void IntrinsicLocationsBuilderMIPS64::VisitMathSqrt(HInvoke* invoke) {
476 CreateFPToFPLocations(arena_, invoke);
477}
478
479void IntrinsicCodeGeneratorMIPS64::VisitMathSqrt(HInvoke* invoke) {
480 LocationSummary* locations = invoke->GetLocations();
481 Mips64Assembler* assembler = GetAssembler();
482 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
483 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
484
485 __ SqrtD(out, in);
486}
487
488static void CreateFPToFP(ArenaAllocator* arena, HInvoke* invoke) {
489 LocationSummary* locations = new (arena) LocationSummary(invoke,
490 LocationSummary::kNoCall,
491 kIntrinsified);
492 locations->SetInAt(0, Location::RequiresFpuRegister());
493 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
494}
495
496// double java.lang.Math.rint(double)
497void IntrinsicLocationsBuilderMIPS64::VisitMathRint(HInvoke* invoke) {
498 CreateFPToFP(arena_, invoke);
499}
500
501void IntrinsicCodeGeneratorMIPS64::VisitMathRint(HInvoke* invoke) {
502 LocationSummary* locations = invoke->GetLocations();
503 Mips64Assembler* assembler = GetAssembler();
504 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
505 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
506
507 __ RintD(out, in);
508}
509
510// double java.lang.Math.floor(double)
511void IntrinsicLocationsBuilderMIPS64::VisitMathFloor(HInvoke* invoke) {
512 CreateFPToFP(arena_, invoke);
513}
514
515// 0x200 - +zero
516// 0x040 - +infinity
517// 0x020 - -zero
518// 0x004 - -infinity
519// 0x002 - quiet NaN
520// 0x001 - signaling NaN
521const constexpr uint16_t CLASS_MASK = 0x267;
522
523void IntrinsicCodeGeneratorMIPS64::VisitMathFloor(HInvoke* invoke) {
524 LocationSummary* locations = invoke->GetLocations();
525 Mips64Assembler* assembler = GetAssembler();
526 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
527 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
528
529 Label done;
530
531 // double floor(double in) {
532 // if in.isNaN || in.isInfinite || in.isZero {
533 // return in;
534 // }
535 __ ClassD(out, in);
536 __ Dmfc1(AT, out);
537 __ Andi(AT, AT, CLASS_MASK); // +0.0 | +Inf | -0.0 | -Inf | qNaN | sNaN
538 __ MovD(out, in);
539 __ Bnezc(AT, &done);
540
541 // Long outLong = floor(in);
542 // if outLong == Long.MAX_VALUE {
543 // // floor() has almost certainly returned a value which
544 // // can't be successfully represented as a signed 64-bit
545 // // number. Java expects that the input value will be
546 // // returned in these cases.
547 // // There is also a small probability that floor(in)
548 // // correctly truncates the input value to Long.MAX_VALUE. In
549 // // that case, this exception handling code still does the
550 // // correct thing.
551 // return in;
552 // }
553 __ FloorLD(out, in);
554 __ Dmfc1(AT, out);
555 __ MovD(out, in);
556 __ LoadConst64(TMP, kPrimLongMax);
557 __ Beqc(AT, TMP, &done);
558
559 // double out = outLong;
560 // return out;
561 __ Dmtc1(AT, out);
562 __ Cvtdl(out, out);
563 __ Bind(&done);
564 // }
565}
566
567// double java.lang.Math.ceil(double)
568void IntrinsicLocationsBuilderMIPS64::VisitMathCeil(HInvoke* invoke) {
569 CreateFPToFP(arena_, invoke);
570}
571
572void IntrinsicCodeGeneratorMIPS64::VisitMathCeil(HInvoke* invoke) {
573 LocationSummary* locations = invoke->GetLocations();
574 Mips64Assembler* assembler = GetAssembler();
575 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>();
576 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>();
577
578 Label done;
579
580 // double ceil(double in) {
581 // if in.isNaN || in.isInfinite || in.isZero {
582 // return in;
583 // }
584 __ ClassD(out, in);
585 __ Dmfc1(AT, out);
586 __ Andi(AT, AT, CLASS_MASK); // +0.0 | +Inf | -0.0 | -Inf | qNaN | sNaN
587 __ MovD(out, in);
588 __ Bnezc(AT, &done);
589
590 // Long outLong = ceil(in);
591 // if outLong == Long.MAX_VALUE {
592 // // ceil() has almost certainly returned a value which
593 // // can't be successfully represented as a signed 64-bit
594 // // number. Java expects that the input value will be
595 // // returned in these cases.
596 // // There is also a small probability that ceil(in)
597 // // correctly rounds up the input value to Long.MAX_VALUE. In
598 // // that case, this exception handling code still does the
599 // // correct thing.
600 // return in;
601 // }
602 __ CeilLD(out, in);
603 __ Dmfc1(AT, out);
604 __ MovD(out, in);
605 __ LoadConst64(TMP, kPrimLongMax);
606 __ Beqc(AT, TMP, &done);
607
608 // double out = outLong;
609 // return out;
610 __ Dmtc1(AT, out);
611 __ Cvtdl(out, out);
612 __ Bind(&done);
613 // }
614}
615
Chris Larsen70fb1f42015-09-04 10:15:27 -0700616// byte libcore.io.Memory.peekByte(long address)
617void IntrinsicLocationsBuilderMIPS64::VisitMemoryPeekByte(HInvoke* invoke) {
618 CreateIntToIntLocations(arena_, invoke);
619}
620
621void IntrinsicCodeGeneratorMIPS64::VisitMemoryPeekByte(HInvoke* invoke) {
622 Mips64Assembler* assembler = GetAssembler();
623 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
624 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
625
626 __ Lb(out, adr, 0);
627}
628
629// short libcore.io.Memory.peekShort(long address)
630void IntrinsicLocationsBuilderMIPS64::VisitMemoryPeekShortNative(HInvoke* invoke) {
631 CreateIntToIntLocations(arena_, invoke);
632}
633
634void IntrinsicCodeGeneratorMIPS64::VisitMemoryPeekShortNative(HInvoke* invoke) {
635 Mips64Assembler* assembler = GetAssembler();
636 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
637 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
638
639 __ Lh(out, adr, 0);
640}
641
642// int libcore.io.Memory.peekInt(long address)
643void IntrinsicLocationsBuilderMIPS64::VisitMemoryPeekIntNative(HInvoke* invoke) {
644 CreateIntToIntLocations(arena_, invoke);
645}
646
647void IntrinsicCodeGeneratorMIPS64::VisitMemoryPeekIntNative(HInvoke* invoke) {
648 Mips64Assembler* assembler = GetAssembler();
649 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
650 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
651
652 __ Lw(out, adr, 0);
653}
654
655// long libcore.io.Memory.peekLong(long address)
656void IntrinsicLocationsBuilderMIPS64::VisitMemoryPeekLongNative(HInvoke* invoke) {
657 CreateIntToIntLocations(arena_, invoke);
658}
659
660void IntrinsicCodeGeneratorMIPS64::VisitMemoryPeekLongNative(HInvoke* invoke) {
661 Mips64Assembler* assembler = GetAssembler();
662 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
663 GpuRegister out = invoke->GetLocations()->Out().AsRegister<GpuRegister>();
664
665 __ Ld(out, adr, 0);
666}
667
668static void CreateIntIntToVoidLocations(ArenaAllocator* arena, HInvoke* invoke) {
669 LocationSummary* locations = new (arena) LocationSummary(invoke,
670 LocationSummary::kNoCall,
671 kIntrinsified);
672 locations->SetInAt(0, Location::RequiresRegister());
673 locations->SetInAt(1, Location::RequiresRegister());
674}
675
676// void libcore.io.Memory.pokeByte(long address, byte value)
677void IntrinsicLocationsBuilderMIPS64::VisitMemoryPokeByte(HInvoke* invoke) {
678 CreateIntIntToVoidLocations(arena_, invoke);
679}
680
681void IntrinsicCodeGeneratorMIPS64::VisitMemoryPokeByte(HInvoke* invoke) {
682 Mips64Assembler* assembler = GetAssembler();
683 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
684 GpuRegister val = invoke->GetLocations()->InAt(1).AsRegister<GpuRegister>();
685
686 __ Sb(val, adr, 0);
687}
688
689// void libcore.io.Memory.pokeShort(long address, short value)
690void IntrinsicLocationsBuilderMIPS64::VisitMemoryPokeShortNative(HInvoke* invoke) {
691 CreateIntIntToVoidLocations(arena_, invoke);
692}
693
694void IntrinsicCodeGeneratorMIPS64::VisitMemoryPokeShortNative(HInvoke* invoke) {
695 Mips64Assembler* assembler = GetAssembler();
696 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
697 GpuRegister val = invoke->GetLocations()->InAt(1).AsRegister<GpuRegister>();
698
699 __ Sh(val, adr, 0);
700}
701
702// void libcore.io.Memory.pokeInt(long address, int value)
703void IntrinsicLocationsBuilderMIPS64::VisitMemoryPokeIntNative(HInvoke* invoke) {
704 CreateIntIntToVoidLocations(arena_, invoke);
705}
706
707void IntrinsicCodeGeneratorMIPS64::VisitMemoryPokeIntNative(HInvoke* invoke) {
708 Mips64Assembler* assembler = GetAssembler();
709 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
710 GpuRegister val = invoke->GetLocations()->InAt(1).AsRegister<GpuRegister>();
711
712 __ Sw(val, adr, 00);
713}
714
715// void libcore.io.Memory.pokeLong(long address, long value)
716void IntrinsicLocationsBuilderMIPS64::VisitMemoryPokeLongNative(HInvoke* invoke) {
717 CreateIntIntToVoidLocations(arena_, invoke);
718}
719
720void IntrinsicCodeGeneratorMIPS64::VisitMemoryPokeLongNative(HInvoke* invoke) {
721 Mips64Assembler* assembler = GetAssembler();
722 GpuRegister adr = invoke->GetLocations()->InAt(0).AsRegister<GpuRegister>();
723 GpuRegister val = invoke->GetLocations()->InAt(1).AsRegister<GpuRegister>();
724
725 __ Sd(val, adr, 0);
726}
727
Chris Larsen3039e382015-08-26 07:54:08 -0700728// Unimplemented intrinsics.
729
730#define UNIMPLEMENTED_INTRINSIC(Name) \
731void IntrinsicLocationsBuilderMIPS64::Visit ## Name(HInvoke* invoke ATTRIBUTE_UNUSED) { \
732} \
733void IntrinsicCodeGeneratorMIPS64::Visit ## Name(HInvoke* invoke ATTRIBUTE_UNUSED) { \
734}
735
Chris Larsen3039e382015-08-26 07:54:08 -0700736UNIMPLEMENTED_INTRINSIC(MathRoundDouble)
737UNIMPLEMENTED_INTRINSIC(MathRoundFloat)
Chris Larsen0b7ac982015-09-04 12:54:28 -0700738
Chris Larsen3039e382015-08-26 07:54:08 -0700739UNIMPLEMENTED_INTRINSIC(ThreadCurrentThread)
740UNIMPLEMENTED_INTRINSIC(UnsafeGet)
741UNIMPLEMENTED_INTRINSIC(UnsafeGetVolatile)
742UNIMPLEMENTED_INTRINSIC(UnsafeGetLong)
743UNIMPLEMENTED_INTRINSIC(UnsafeGetLongVolatile)
744UNIMPLEMENTED_INTRINSIC(UnsafeGetObject)
745UNIMPLEMENTED_INTRINSIC(UnsafeGetObjectVolatile)
746UNIMPLEMENTED_INTRINSIC(UnsafePut)
747UNIMPLEMENTED_INTRINSIC(UnsafePutOrdered)
748UNIMPLEMENTED_INTRINSIC(UnsafePutVolatile)
749UNIMPLEMENTED_INTRINSIC(UnsafePutObject)
750UNIMPLEMENTED_INTRINSIC(UnsafePutObjectOrdered)
751UNIMPLEMENTED_INTRINSIC(UnsafePutObjectVolatile)
752UNIMPLEMENTED_INTRINSIC(UnsafePutLong)
753UNIMPLEMENTED_INTRINSIC(UnsafePutLongOrdered)
754UNIMPLEMENTED_INTRINSIC(UnsafePutLongVolatile)
755UNIMPLEMENTED_INTRINSIC(UnsafeCASInt)
756UNIMPLEMENTED_INTRINSIC(UnsafeCASLong)
757UNIMPLEMENTED_INTRINSIC(UnsafeCASObject)
758UNIMPLEMENTED_INTRINSIC(StringCharAt)
759UNIMPLEMENTED_INTRINSIC(StringCompareTo)
760UNIMPLEMENTED_INTRINSIC(StringEquals)
761UNIMPLEMENTED_INTRINSIC(StringIndexOf)
762UNIMPLEMENTED_INTRINSIC(StringIndexOfAfter)
763UNIMPLEMENTED_INTRINSIC(StringNewStringFromBytes)
764UNIMPLEMENTED_INTRINSIC(StringNewStringFromChars)
765UNIMPLEMENTED_INTRINSIC(StringNewStringFromString)
766UNIMPLEMENTED_INTRINSIC(LongRotateLeft)
767UNIMPLEMENTED_INTRINSIC(LongRotateRight)
768UNIMPLEMENTED_INTRINSIC(LongNumberOfTrailingZeros)
769UNIMPLEMENTED_INTRINSIC(IntegerRotateLeft)
770UNIMPLEMENTED_INTRINSIC(IntegerRotateRight)
771UNIMPLEMENTED_INTRINSIC(IntegerNumberOfTrailingZeros)
772
773UNIMPLEMENTED_INTRINSIC(ReferenceGetReferent)
774UNIMPLEMENTED_INTRINSIC(StringGetCharsNoCheck)
775UNIMPLEMENTED_INTRINSIC(SystemArrayCopyChar)
776
777#undef UNIMPLEMENTED_INTRINSIC
778
779#undef __
780
781} // namespace mips64
782} // namespace art