| buzbee | 1452bee | 2015-03-06 14:43:04 -0800 | [diff] [blame] | 1 | %default {"preinstr":""} |
| 2 | /* |
| 3 | * Generic 64-bit unary operation. Provide an "instr" line that |
| 4 | * specifies an instruction that performs "result = op r0/r1". |
| 5 | * This could be an ARM instruction or a function call. |
| 6 | * |
| 7 | * For: neg-long, not-long, neg-double, long-to-double, double-to-long |
| 8 | */ |
| 9 | /* unop vA, vB */ |
| 10 | mov r3, rINST, lsr #12 @ r3<- B |
| buzbee | 50cf600 | 2016-02-10 08:59:12 -0800 | [diff] [blame] | 11 | ubfx rINST, rINST, #8, #4 @ rINST<- A |
| buzbee | ace690f | 2016-03-11 09:51:11 -0800 | [diff] [blame] | 12 | VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[B] |
| 13 | VREG_INDEX_TO_ADDR r9, rINST @ r9<- &fp[A] |
| buzbee | 1452bee | 2015-03-06 14:43:04 -0800 | [diff] [blame] | 14 | ldmia r3, {r0-r1} @ r0/r1<- vAA |
| buzbee | 50cf600 | 2016-02-10 08:59:12 -0800 | [diff] [blame] | 15 | CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs |
| buzbee | 1452bee | 2015-03-06 14:43:04 -0800 | [diff] [blame] | 16 | FETCH_ADVANCE_INST 1 @ advance rPC, load rINST |
| 17 | $preinstr @ optional op; may set condition codes |
| 18 | $instr @ r0/r1<- op, r2-r3 changed |
| 19 | GET_INST_OPCODE ip @ extract opcode from rINST |
| 20 | stmia r9, {r0-r1} @ vAA<- r0/r1 |
| 21 | GOTO_OPCODE ip @ jump to next instruction |
| 22 | /* 10-11 instructions */ |