| Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1 | %default {"result":"","second":"","wide":"","suffix":"","rem":"0","ext":"cdq"} |
| 2 | /* |
| 3 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4 | */ |
| 5 | /* div/rem vAA, vBB, vCC */ |
| 6 | movzbq 2(rPC), %rax # rax <- BB |
| 7 | movzbq 3(rPC), %rcx # rcx <- CC |
| 8 | .if $wide |
| 9 | GET_WIDE_VREG %rax, %rax # eax <- vBB |
| 10 | GET_WIDE_VREG $second, %rcx # ecx <- vCC |
| 11 | .else |
| 12 | GET_VREG %eax, %rax # eax <- vBB |
| 13 | GET_VREG $second, %rcx # ecx <- vCC |
| 14 | .endif |
| 15 | test${suffix} $second, $second |
| 16 | jz common_errDivideByZero |
| 17 | cmp${suffix} $$-1, $second |
| 18 | je 2f |
| 19 | $ext # rdx:rax <- sign-extended of rax |
| 20 | idiv${suffix} $second |
| 21 | 1: |
| 22 | .if $wide |
| 23 | SET_WIDE_VREG $result, rINSTq # eax <- vBB |
| 24 | .else |
| 25 | SET_VREG $result, rINSTq # eax <- vBB |
| 26 | .endif |
| 27 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 28 | 2: |
| 29 | .if $rem |
| 30 | xor${suffix} $result, $result |
| 31 | .else |
| 32 | neg${suffix} $result |
| 33 | .endif |
| 34 | jmp 1b |