| Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1 | %default {"wide":"0"} |
| 2 | /* |
| 3 | * Generic 32-bit binary operation in which both operands loaded to |
| 4 | * registers (op0 in eax, op1 in ecx). |
| 5 | */ |
| 6 | /* binop vAA, vBB, vCC */ |
| 7 | movzbq 2(rPC), %rax # eax <- BB |
| 8 | movzbq 3(rPC), %rcx # ecx <- CC |
| 9 | GET_VREG %ecx, %rcx # eax <- vCC |
| 10 | .if $wide |
| 11 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 12 | $instr # ex: addl %ecx,%eax |
| 13 | SET_WIDE_VREG %rax, rINSTq |
| 14 | .else |
| 15 | GET_VREG %eax, %rax # eax <- vBB |
| 16 | $instr # ex: addl %ecx,%eax |
| 17 | SET_VREG %eax, rINSTq |
| 18 | .endif |
| 19 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |