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review.blissroms.org / platform_art / 303b01ed0d36017371e29b1f1e209dd19896ac9e / . / src / compiler / Dataflow.cc
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buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "Dalvik.h"
18#include "Dataflow.h"
19//#include "libdex/DexOpcodes.h"
20
21/*
22 * Main table containing data flow attributes for each bytecode. The
23 * first kNumPackedOpcodes entries are for Dalvik bytecode
24 * instructions, where extended opcode at the MIR level are appended
25 * afterwards.
26 *
27 * TODO - many optimization flags are incomplete - they will only limit the
28 * scope of optimizations but will not cause mis-optimizations.
29 */
30int oatDataFlowAttributes[kMirOpLast] = {
31 // 00 OP_NOP
32 DF_NOP,
33
34 // 01 OP_MOVE vA, vB
35 DF_DA | DF_UB | DF_IS_MOVE,
36
37 // 02 OP_MOVE_FROM16 vAA, vBBBB
38 DF_DA | DF_UB | DF_IS_MOVE,
39
40 // 03 OP_MOVE_16 vAAAA, vBBBB
41 DF_DA | DF_UB | DF_IS_MOVE,
42
43 // 04 OP_MOVE_WIDE vA, vB
44 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
45
46 // 05 OP_MOVE_WIDE_FROM16 vAA, vBBBB
47 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
48
49 // 06 OP_MOVE_WIDE_16 vAAAA, vBBBB
50 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
51
52 // 07 OP_MOVE_OBJECT vA, vB
53 DF_DA | DF_UB | DF_IS_MOVE,
54
55 // 08 OP_MOVE_OBJECT_FROM16 vAA, vBBBB
56 DF_DA | DF_UB | DF_IS_MOVE,
57
58 // 09 OP_MOVE_OBJECT_16 vAAAA, vBBBB
59 DF_DA | DF_UB | DF_IS_MOVE,
60
61 // 0A OP_MOVE_RESULT vAA
62 DF_DA,
63
64 // 0B OP_MOVE_RESULT_WIDE vAA
65 DF_DA_WIDE,
66
67 // 0C OP_MOVE_RESULT_OBJECT vAA
68 DF_DA,
69
70 // 0D OP_MOVE_EXCEPTION vAA
71 DF_DA,
72
73 // 0E OP_RETURN_VOID
74 DF_NOP,
75
76 // 0F OP_RETURN vAA
77 DF_UA,
78
79 // 10 OP_RETURN_WIDE vAA
80 DF_UA_WIDE,
81
82 // 11 OP_RETURN_OBJECT vAA
83 DF_UA,
84
85 // 12 OP_CONST_4 vA, #+B
86 DF_DA | DF_SETS_CONST,
87
88 // 13 OP_CONST_16 vAA, #+BBBB
89 DF_DA | DF_SETS_CONST,
90
91 // 14 OP_CONST vAA, #+BBBBBBBB
92 DF_DA | DF_SETS_CONST,
93
94 // 15 OP_CONST_HIGH16 VAA, #+BBBB0000
95 DF_DA | DF_SETS_CONST,
96
97 // 16 OP_CONST_WIDE_16 vAA, #+BBBB
98 DF_DA_WIDE | DF_SETS_CONST,
99
100 // 17 OP_CONST_WIDE_32 vAA, #+BBBBBBBB
101 DF_DA_WIDE | DF_SETS_CONST,
102
103 // 18 OP_CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
104 DF_DA_WIDE | DF_SETS_CONST,
105
106 // 19 OP_CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
107 DF_DA_WIDE | DF_SETS_CONST,
108
109 // 1A OP_CONST_STRING vAA, string@BBBB
110 DF_DA,
111
112 // 1B OP_CONST_STRING_JUMBO vAA, string@BBBBBBBB
113 DF_DA,
114
115 // 1C OP_CONST_CLASS vAA, type@BBBB
116 DF_DA,
117
118 // 1D OP_MONITOR_ENTER vAA
119 DF_UA,
120
121 // 1E OP_MONITOR_EXIT vAA
122 DF_UA,
123
124 // 1F OP_CHECK_CAST vAA, type@BBBB
125 DF_UA,
126
127 // 20 OP_INSTANCE_OF vA, vB, type@CCCC
128 DF_DA | DF_UB,
129
130 // 21 OP_ARRAY_LENGTH vA, vB
131 DF_DA | DF_UB,
132
133 // 22 OP_NEW_INSTANCE vAA, type@BBBB
134 DF_DA,
135
136 // 23 OP_NEW_ARRAY vA, vB, type@CCCC
137 DF_DA | DF_UB,
138
139 // 24 OP_FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
140 DF_FORMAT_35C,
141
142 // 25 OP_FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
143 DF_FORMAT_3RC,
144
145 // 26 OP_FILL_ARRAY_DATA vAA, +BBBBBBBB
146 DF_UA,
147
148 // 27 OP_THROW vAA
149 DF_UA,
150
151 // 28 OP_GOTO
152 DF_NOP,
153
154 // 29 OP_GOTO_16
155 DF_NOP,
156
157 // 2A OP_GOTO_32
158 DF_NOP,
159
160 // 2B OP_PACKED_SWITCH vAA, +BBBBBBBB
161 DF_UA,
162
163 // 2C OP_SPARSE_SWITCH vAA, +BBBBBBBB
164 DF_UA,
165
166 // 2D OP_CMPL_FLOAT vAA, vBB, vCC
167 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C,
168
169 // 2E OP_CMPG_FLOAT vAA, vBB, vCC
170 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C,
171
172 // 2F OP_CMPL_DOUBLE vAA, vBB, vCC
173 DF_DA | DF_UB_WIDE | DF_UC_WIDE | DF_FP_B | DF_FP_C,
174
175 // 30 OP_CMPG_DOUBLE vAA, vBB, vCC
176 DF_DA | DF_UB_WIDE | DF_UC_WIDE | DF_FP_B | DF_FP_C,
177
178 // 31 OP_CMP_LONG vAA, vBB, vCC
179 DF_DA | DF_UB_WIDE | DF_UC_WIDE,
180
181 // 32 OP_IF_EQ vA, vB, +CCCC
182 DF_UA | DF_UB,
183
184 // 33 OP_IF_NE vA, vB, +CCCC
185 DF_UA | DF_UB,
186
187 // 34 OP_IF_LT vA, vB, +CCCC
188 DF_UA | DF_UB,
189
190 // 35 OP_IF_GE vA, vB, +CCCC
191 DF_UA | DF_UB,
192
193 // 36 OP_IF_GT vA, vB, +CCCC
194 DF_UA | DF_UB,
195
196 // 37 OP_IF_LE vA, vB, +CCCC
197 DF_UA | DF_UB,
198
199
200 // 38 OP_IF_EQZ vAA, +BBBB
201 DF_UA,
202
203 // 39 OP_IF_NEZ vAA, +BBBB
204 DF_UA,
205
206 // 3A OP_IF_LTZ vAA, +BBBB
207 DF_UA,
208
209 // 3B OP_IF_GEZ vAA, +BBBB
210 DF_UA,
211
212 // 3C OP_IF_GTZ vAA, +BBBB
213 DF_UA,
214
215 // 3D OP_IF_LEZ vAA, +BBBB
216 DF_UA,
217
218 // 3E OP_UNUSED_3E
219 DF_NOP,
220
221 // 3F OP_UNUSED_3F
222 DF_NOP,
223
224 // 40 OP_UNUSED_40
225 DF_NOP,
226
227 // 41 OP_UNUSED_41
228 DF_NOP,
229
230 // 42 OP_UNUSED_42
231 DF_NOP,
232
233 // 43 OP_UNUSED_43
234 DF_NOP,
235
236 // 44 OP_AGET vAA, vBB, vCC
237 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
238
239 // 45 OP_AGET_WIDE vAA, vBB, vCC
240 DF_DA_WIDE | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
241
242 // 46 OP_AGET_OBJECT vAA, vBB, vCC
243 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
244
245 // 47 OP_AGET_BOOLEAN vAA, vBB, vCC
246 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
247
248 // 48 OP_AGET_BYTE vAA, vBB, vCC
249 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
250
251 // 49 OP_AGET_CHAR vAA, vBB, vCC
252 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
253
254 // 4A OP_AGET_SHORT vAA, vBB, vCC
255 DF_DA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_0 | DF_IS_GETTER,
256
257 // 4B OP_APUT vAA, vBB, vCC
258 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
259
260 // 4C OP_APUT_WIDE vAA, vBB, vCC
261 DF_UA_WIDE | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_2 | DF_IS_SETTER,
262
263 // 4D OP_APUT_OBJECT vAA, vBB, vCC
264 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
265
266 // 4E OP_APUT_BOOLEAN vAA, vBB, vCC
267 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
268
269 // 4F OP_APUT_BYTE vAA, vBB, vCC
270 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
271
272 // 50 OP_APUT_CHAR vAA, vBB, vCC
273 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
274
275 // 51 OP_APUT_SHORT vAA, vBB, vCC
276 DF_UA | DF_UB | DF_UC | DF_NULL_N_RANGE_CHECK_1 | DF_IS_SETTER,
277
278 // 52 OP_IGET vA, vB, field@CCCC
279 DF_DA | DF_UB | DF_IS_GETTER,
280
281 // 53 OP_IGET_WIDE vA, vB, field@CCCC
282 DF_DA_WIDE | DF_UB | DF_IS_GETTER,
283
284 // 54 OP_IGET_OBJECT vA, vB, field@CCCC
285 DF_DA | DF_UB | DF_IS_GETTER,
286
287 // 55 OP_IGET_BOOLEAN vA, vB, field@CCCC
288 DF_DA | DF_UB | DF_IS_GETTER,
289
290 // 56 OP_IGET_BYTE vA, vB, field@CCCC
291 DF_DA | DF_UB | DF_IS_GETTER,
292
293 // 57 OP_IGET_CHAR vA, vB, field@CCCC
294 DF_DA | DF_UB | DF_IS_GETTER,
295
296 // 58 OP_IGET_SHORT vA, vB, field@CCCC
297 DF_DA | DF_UB | DF_IS_GETTER,
298
299 // 59 OP_IPUT vA, vB, field@CCCC
300 DF_UA | DF_UB | DF_IS_SETTER,
301
302 // 5A OP_IPUT_WIDE vA, vB, field@CCCC
303 DF_UA_WIDE | DF_UB | DF_IS_SETTER,
304
305 // 5B OP_IPUT_OBJECT vA, vB, field@CCCC
306 DF_UA | DF_UB | DF_IS_SETTER,
307
308 // 5C OP_IPUT_BOOLEAN vA, vB, field@CCCC
309 DF_UA | DF_UB | DF_IS_SETTER,
310
311 // 5D OP_IPUT_BYTE vA, vB, field@CCCC
312 DF_UA | DF_UB | DF_IS_SETTER,
313
314 // 5E OP_IPUT_CHAR vA, vB, field@CCCC
315 DF_UA | DF_UB | DF_IS_SETTER,
316
317 // 5F OP_IPUT_SHORT vA, vB, field@CCCC
318 DF_UA | DF_UB | DF_IS_SETTER,
319
320 // 60 OP_SGET vAA, field@BBBB
321 DF_DA | DF_IS_GETTER,
322
323 // 61 OP_SGET_WIDE vAA, field@BBBB
324 DF_DA_WIDE | DF_IS_GETTER,
325
326 // 62 OP_SGET_OBJECT vAA, field@BBBB
327 DF_DA | DF_IS_GETTER,
328
329 // 63 OP_SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_IS_GETTER,
331
332 // 64 OP_SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_IS_GETTER,
334
335 // 65 OP_SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_IS_GETTER,
337
338 // 66 OP_SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_IS_GETTER,
340
341 // 67 OP_SPUT vAA, field@BBBB
342 DF_UA | DF_IS_SETTER,
343
344 // 68 OP_SPUT_WIDE vAA, field@BBBB
345 DF_UA_WIDE | DF_IS_SETTER,
346
347 // 69 OP_SPUT_OBJECT vAA, field@BBBB
348 DF_UA | DF_IS_SETTER,
349
350 // 6A OP_SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_IS_SETTER,
352
353 // 6B OP_SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_IS_SETTER,
355
356 // 6C OP_SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_IS_SETTER,
358
359 // 6D OP_SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_IS_SETTER,
361
362 // 6E OP_INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C,
364
365 // 6F OP_INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C,
367
368 // 70 OP_INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C,
370
371 // 71 OP_INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C,
373
374 // 72 OP_INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C,
376
377 // 73 OP_UNUSED_73
378 DF_NOP,
379
380 // 74 OP_INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC,
382
383 // 75 OP_INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC,
385
386 // 76 OP_INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC,
388
389 // 77 OP_INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC,
391
392 // 78 OP_INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC,
394
395 // 79 OP_UNUSED_79
396 DF_NOP,
397
398 // 7A OP_UNUSED_7A
399 DF_NOP,
400
401 // 7B OP_NEG_INT vA, vB
402 DF_DA | DF_UB,
403
404 // 7C OP_NOT_INT vA, vB
405 DF_DA | DF_UB,
406
407 // 7D OP_NEG_LONG vA, vB
408 DF_DA_WIDE | DF_UB_WIDE,
409
410 // 7E OP_NOT_LONG vA, vB
411 DF_DA_WIDE | DF_UB_WIDE,
412
413 // 7F OP_NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
415
416 // 80 OP_NEG_DOUBLE vA, vB
417 DF_DA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
418
419 // 81 OP_INT_TO_LONG vA, vB
420 DF_DA_WIDE | DF_UB,
421
422 // 82 OP_INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A,
424
425 // 83 OP_INT_TO_DOUBLE vA, vB
426 DF_DA_WIDE | DF_UB | DF_FP_A,
427
428 // 84 OP_LONG_TO_INT vA, vB
429 DF_DA | DF_UB_WIDE,
430
431 // 85 OP_LONG_TO_FLOAT vA, vB
432 DF_DA | DF_UB_WIDE | DF_FP_A,
433
434 // 86 OP_LONG_TO_DOUBLE vA, vB
435 DF_DA_WIDE | DF_UB_WIDE | DF_FP_A,
436
437 // 87 OP_FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B,
439
440 // 88 OP_FLOAT_TO_LONG vA, vB
441 DF_DA_WIDE | DF_UB | DF_FP_B,
442
443 // 89 OP_FLOAT_TO_DOUBLE vA, vB
444 DF_DA_WIDE | DF_UB | DF_FP_A | DF_FP_B,
445
446 // 8A OP_DOUBLE_TO_INT vA, vB
447 DF_DA | DF_UB_WIDE | DF_FP_B,
448
449 // 8B OP_DOUBLE_TO_LONG vA, vB
450 DF_DA_WIDE | DF_UB_WIDE | DF_FP_B,
451
452 // 8C OP_DOUBLE_TO_FLOAT vA, vB
453 DF_DA | DF_UB_WIDE | DF_FP_A | DF_FP_B,
454
455 // 8D OP_INT_TO_BYTE vA, vB
456 DF_DA | DF_UB,
457
458 // 8E OP_INT_TO_CHAR vA, vB
459 DF_DA | DF_UB,
460
461 // 8F OP_INT_TO_SHORT vA, vB
462 DF_DA | DF_UB,
463
464 // 90 OP_ADD_INT vAA, vBB, vCC
465 DF_DA | DF_UB | DF_UC | DF_IS_LINEAR,
466
467 // 91 OP_SUB_INT vAA, vBB, vCC
468 DF_DA | DF_UB | DF_UC | DF_IS_LINEAR,
469
470 // 92 OP_MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC,
472
473 // 93 OP_DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC,
475
476 // 94 OP_REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC,
478
479 // 95 OP_AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC,
481
482 // 96 OP_OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC,
484
485 // 97 OP_XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC,
487
488 // 98 OP_SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC,
490
491 // 99 OP_SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC,
493
494 // 9A OP_USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC,
496
497 // 9B OP_ADD_LONG vAA, vBB, vCC
498 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
499
500 // 9C OP_SUB_LONG vAA, vBB, vCC
501 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
502
503 // 9D OP_MUL_LONG vAA, vBB, vCC
504 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
505
506 // 9E OP_DIV_LONG vAA, vBB, vCC
507 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
508
509 // 9F OP_REM_LONG vAA, vBB, vCC
510 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
511
512 // A0 OP_AND_LONG vAA, vBB, vCC
513 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
514
515 // A1 OP_OR_LONG vAA, vBB, vCC
516 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
517
518 // A2 OP_XOR_LONG vAA, vBB, vCC
519 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
520
521 // A3 OP_SHL_LONG vAA, vBB, vCC
522 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
523
524 // A4 OP_SHR_LONG vAA, vBB, vCC
525 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
526
527 // A5 OP_USHR_LONG vAA, vBB, vCC
528 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
529
530 // A6 OP_ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
532
533 // A7 OP_SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
535
536 // A8 OP_MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
538
539 // A9 OP_DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
541
542 // AA OP_REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
544
545 // AB OP_ADD_DOUBLE vAA, vBB, vCC
546 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
547
548 // AC OP_SUB_DOUBLE vAA, vBB, vCC
549 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
550
551 // AD OP_MUL_DOUBLE vAA, vBB, vCC
552 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
553
554 // AE OP_DIV_DOUBLE vAA, vBB, vCC
555 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
556
557 // AF OP_REM_DOUBLE vAA, vBB, vCC
558 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
559
560 // B0 OP_ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB,
562
563 // B1 OP_SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB,
565
566 // B2 OP_MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB,
568
569 // B3 OP_DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB,
571
572 // B4 OP_REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB,
574
575 // B5 OP_AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB,
577
578 // B6 OP_OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB,
580
581 // B7 OP_XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB,
583
584 // B8 OP_SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB,
586
587 // B9 OP_SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB,
589
590 // BA OP_USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB,
592
593 // BB OP_ADD_LONG_2ADDR vA, vB
594 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
595
596 // BC OP_SUB_LONG_2ADDR vA, vB
597 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
598
599 // BD OP_MUL_LONG_2ADDR vA, vB
600 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
601
602 // BE OP_DIV_LONG_2ADDR vA, vB
603 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
604
605 // BF OP_REM_LONG_2ADDR vA, vB
606 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
607
608 // C0 OP_AND_LONG_2ADDR vA, vB
609 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
610
611 // C1 OP_OR_LONG_2ADDR vA, vB
612 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
613
614 // C2 OP_XOR_LONG_2ADDR vA, vB
615 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
616
617 // C3 OP_SHL_LONG_2ADDR vA, vB
618 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
619
620 // C4 OP_SHR_LONG_2ADDR vA, vB
621 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
622
623 // C5 OP_USHR_LONG_2ADDR vA, vB
624 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
625
626 // C6 OP_ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
628
629 // C7 OP_SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
631
632 // C8 OP_MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
634
635 // C9 OP_DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
637
638 // CA OP_REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
640
641 // CB OP_ADD_DOUBLE_2ADDR vA, vB
642 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
643
644 // CC OP_SUB_DOUBLE_2ADDR vA, vB
645 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
646
647 // CD OP_MUL_DOUBLE_2ADDR vA, vB
648 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
649
650 // CE OP_DIV_DOUBLE_2ADDR vA, vB
651 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
652
653 // CF OP_REM_DOUBLE_2ADDR vA, vB
654 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
655
656 // D0 OP_ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB,
658
659 // D1 OP_RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB,
661
662 // D2 OP_MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB,
664
665 // D3 OP_DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB,
667
668 // D4 OP_REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB,
670
671 // D5 OP_AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB,
673
674 // D6 OP_OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB,
676
677 // D7 OP_XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB,
679
680 // D8 OP_ADD_INT_LIT8 vAA, vBB, #+CC
681 DF_DA | DF_UB | DF_IS_LINEAR,
682
683 // D9 OP_RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB,
685
686 // DA OP_MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB,
688
689 // DB OP_DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB,
691
692 // DC OP_REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB,
694
695 // DD OP_AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB,
697
698 // DE OP_OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB,
700
701 // DF OP_XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB,
703
704 // E0 OP_SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB,
706
707 // E1 OP_SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB,
709
710 // E2 OP_USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB,
712
713 // E3 OP_IGET_VOLATILE
714 DF_DA | DF_UB,
715
716 // E4 OP_IPUT_VOLATILE
717 DF_UA | DF_UB,
718
719 // E5 OP_SGET_VOLATILE
720 DF_DA,
721
722 // E6 OP_SPUT_VOLATILE
723 DF_UA,
724
725 // E7 OP_IGET_OBJECT_VOLATILE
726 DF_DA | DF_UB,
727
728 // E8 OP_IGET_WIDE_VOLATILE
729 DF_DA_WIDE | DF_UB,
730
731 // E9 OP_IPUT_WIDE_VOLATILE
732 DF_UA_WIDE | DF_UB,
733
734 // EA OP_SGET_WIDE_VOLATILE
735 DF_DA_WIDE,
736
737 // EB OP_SPUT_WIDE_VOLATILE
738 DF_UA_WIDE,
739
740 // EC OP_BREAKPOINT
741 DF_NOP,
742
743 // ED OP_THROW_VERIFICATION_ERROR
744 DF_NOP,
745
746 // EE OP_EXECUTE_INLINE
747 DF_FORMAT_35C,
748
749 // EF OP_EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
751
752 // F0 OP_INVOKE_OBJECT_INIT_RANGE
753 DF_NOP,
754
755 // F1 OP_RETURN_VOID_BARRIER
756 DF_NOP,
757
758 // F2 OP_IGET_QUICK
759 DF_DA | DF_UB | DF_IS_GETTER,
760
761 // F3 OP_IGET_WIDE_QUICK
762 DF_DA_WIDE | DF_UB | DF_IS_GETTER,
763
764 // F4 OP_IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_IS_GETTER,
766
767 // F5 OP_IPUT_QUICK
768 DF_UA | DF_UB | DF_IS_SETTER,
769
770 // F6 OP_IPUT_WIDE_QUICK
771 DF_UA_WIDE | DF_UB | DF_IS_SETTER,
772
773 // F7 OP_IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_IS_SETTER,
775
776 // F8 OP_INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C,
778
779 // F9 OP_INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC,
781
782 // FA OP_INVOKE_SUPER_QUICK
783 DF_FORMAT_35C,
784
785 // FB OP_INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC,
787
788 // FC OP_IPUT_OBJECT_VOLATILE
789 DF_UA | DF_UB,
790
791 // FD OP_SGET_OBJECT_VOLATILE
792 DF_DA,
793
794 // FE OP_SPUT_OBJECT_VOLATILE
795 DF_UA,
796
797 // FF OP_DISPATCH_FF
798 DF_NOP,
799
800 // 100 OP_CONST_CLASS_JUMBO vAAAA, type@BBBBBBBB
801 DF_DA,
802
803 // 101 OP_CHECK_CAST_JUMBO vAAAA, type@BBBBBBBB
804 DF_UA,
805
806 // 102 OP_INSTANCE_OF_JUMBO vAAAA, vBBBB, type@CCCCCCCC
807 DF_DA | DF_UB,
808
809 // 103 OP_NEW_INSTANCE_JUMBO vAAAA, type@BBBBBBBB
810 DF_DA,
811
812 // 104 OP_NEW_ARRAY_JUMBO vAAAA, vBBBB, type@CCCCCCCC
813 DF_DA | DF_UB,
814
815 // 105 OP_FILLED_NEW_ARRAY_JUMBO {vCCCC .. vNNNN}, type@BBBBBBBB
816 DF_FORMAT_3RC,
817
818 // 106 OP_IGET_JUMBO vAAAA, vBBBB, field@CCCCCCCC
819 DF_DA | DF_UB | DF_IS_GETTER,
820
821 // 107 OP_IGET_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
822 DF_DA_WIDE | DF_UB | DF_IS_GETTER,
823
824 // 108 OP_IGET_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
825 DF_DA | DF_UB | DF_IS_GETTER,
826
827 // 109 OP_IGET_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
828 DF_DA | DF_UB | DF_IS_GETTER,
829
830 // 10A OP_IGET_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
831 DF_DA | DF_UB | DF_IS_GETTER,
832
833 // 10B OP_IGET_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
834 DF_DA | DF_UB | DF_IS_GETTER,
835
836 // 10C OP_IGET_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
837 DF_DA | DF_UB | DF_IS_GETTER,
838
839 // 10D OP_IPUT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
840 DF_UA | DF_UB | DF_IS_SETTER,
841
842 // 10E OP_IPUT_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
843 DF_UA_WIDE | DF_UB | DF_IS_SETTER,
844
845 // 10F OP_IPUT_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
846 DF_UA | DF_UB | DF_IS_SETTER,
847
848 // 110 OP_IPUT_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
849 DF_UA | DF_UB | DF_IS_SETTER,
850
851 // 111 OP_IPUT_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
852 DF_UA | DF_UB | DF_IS_SETTER,
853
854 // 112 OP_IPUT_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
855 DF_UA | DF_UB | DF_IS_SETTER,
856
857 // 113 OP_IPUT_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
858 DF_UA | DF_UB | DF_IS_SETTER,
859
860 // 114 OP_SGET_JUMBO vAAAA, vBBBB, field@CCCCCCCC
861 DF_DA | DF_IS_GETTER,
862
863 // 115 OP_SGET_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
864 DF_DA_WIDE | DF_IS_GETTER,
865
866 // 116 OP_SGET_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
867 DF_DA | DF_IS_GETTER,
868
869 // 117 OP_SGET_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
870 DF_DA | DF_IS_GETTER,
871
872 // 118 OP_SGET_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
873 DF_DA | DF_IS_GETTER,
874
875 // 119 OP_SGET_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
876 DF_DA | DF_IS_GETTER,
877
878 // 11A OP_SGET_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
879 DF_DA | DF_IS_GETTER,
880
881 // 11B OP_SPUT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
882 DF_UA | DF_IS_SETTER,
883
884 // 11C OP_SPUT_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
885 DF_UA_WIDE | DF_IS_SETTER,
886
887 // 11D OP_SPUT_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
888 DF_UA | DF_IS_SETTER,
889
890 // 11E OP_SPUT_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
891 DF_UA | DF_IS_SETTER,
892
893 // 11F OP_SPUT_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
894 DF_UA | DF_IS_SETTER,
895
896 // 120 OP_SPUT_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
897 DF_UA | DF_IS_SETTER,
898
899 // 121 OP_SPUT_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
900 DF_UA | DF_IS_SETTER,
901
902 // 122 OP_INVOKE_VIRTUAL_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
903 DF_FORMAT_3RC,
904
905 // 123 OP_INVOKE_SUPER_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
906 DF_FORMAT_3RC,
907
908 // 124 OP_INVOKE_DIRECT_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
909 DF_FORMAT_3RC,
910
911 // 125 OP_INVOKE_STATIC_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
912 DF_FORMAT_3RC,
913
914 // 126 OP_INVOKE_INTERFACE_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
915 DF_FORMAT_3RC,
916
917 // 127 OP_UNUSED_27FF
918 DF_NOP,
919
920 // 128 OP_UNUSED_28FF
921 DF_NOP,
922
923 // 129 OP_UNUSED_29FF
924 DF_NOP,
925
926 // 12A OP_UNUSED_2AFF
927 DF_NOP,
928
929 // 12B OP_UNUSED_2BFF
930 DF_NOP,
931
932 // 12C OP_UNUSED_2CFF
933 DF_NOP,
934
935 // 12D OP_UNUSED_2DFF
936 DF_NOP,
937
938 // 12E OP_UNUSED_2EFF
939 DF_NOP,
940
941 // 12F OP_UNUSED_2FFF
942 DF_NOP,
943
944 // 130 OP_UNUSED_30FF
945 DF_NOP,
946
947 // 131 OP_UNUSED_31FF
948 DF_NOP,
949
950 // 132 OP_UNUSED_32FF
951 DF_NOP,
952
953 // 133 OP_UNUSED_33FF
954 DF_NOP,
955
956 // 134 OP_UNUSED_34FF
957 DF_NOP,
958
959 // 135 OP_UNUSED_35FF
960 DF_NOP,
961
962 // 136 OP_UNUSED_36FF
963 DF_NOP,
964
965 // 137 OP_UNUSED_37FF
966 DF_NOP,
967
968 // 138 OP_UNUSED_38FF
969 DF_NOP,
970
971 // 139 OP_UNUSED_39FF
972 DF_NOP,
973
974 // 13A OP_UNUSED_3AFF
975 DF_NOP,
976
977 // 13B OP_UNUSED_3BFF
978 DF_NOP,
979
980 // 13C OP_UNUSED_3CFF
981 DF_NOP,
982
983 // 13D OP_UNUSED_3DFF
984 DF_NOP,
985
986 // 13E OP_UNUSED_3EFF
987 DF_NOP,
988
989 // 13F OP_UNUSED_3FFF
990 DF_NOP,
991
992 // 140 OP_UNUSED_40FF
993 DF_NOP,
994
995 // 141 OP_UNUSED_41FF
996 DF_NOP,
997
998 // 142 OP_UNUSED_42FF
999 DF_NOP,
1000
1001 // 143 OP_UNUSED_43FF
1002 DF_NOP,
1003
1004 // 144 OP_UNUSED_44FF
1005 DF_NOP,
1006
1007 // 145 OP_UNUSED_45FF
1008 DF_NOP,
1009
1010 // 146 OP_UNUSED_46FF
1011 DF_NOP,
1012
1013 // 147 OP_UNUSED_47FF
1014 DF_NOP,
1015
1016 // 148 OP_UNUSED_48FF
1017 DF_NOP,
1018
1019 // 149 OP_UNUSED_49FF
1020 DF_NOP,
1021
1022 // 14A OP_UNUSED_4AFF
1023 DF_NOP,
1024
1025 // 14B OP_UNUSED_4BFF
1026 DF_NOP,
1027
1028 // 14C OP_UNUSED_4CFF
1029 DF_NOP,
1030
1031 // 14D OP_UNUSED_4DFF
1032 DF_NOP,
1033
1034 // 14E OP_UNUSED_4EFF
1035 DF_NOP,
1036
1037 // 14F OP_UNUSED_4FFF
1038 DF_NOP,
1039
1040 // 150 OP_UNUSED_50FF
1041 DF_NOP,
1042
1043 // 151 OP_UNUSED_51FF
1044 DF_NOP,
1045
1046 // 152 OP_UNUSED_52FF
1047 DF_NOP,
1048
1049 // 153 OP_UNUSED_53FF
1050 DF_NOP,
1051
1052 // 154 OP_UNUSED_54FF
1053 DF_NOP,
1054
1055 // 155 OP_UNUSED_55FF
1056 DF_NOP,
1057
1058 // 156 OP_UNUSED_56FF
1059 DF_NOP,
1060
1061 // 157 OP_UNUSED_57FF
1062 DF_NOP,
1063
1064 // 158 OP_UNUSED_58FF
1065 DF_NOP,
1066
1067 // 159 OP_UNUSED_59FF
1068 DF_NOP,
1069
1070 // 15A OP_UNUSED_5AFF
1071 DF_NOP,
1072
1073 // 15B OP_UNUSED_5BFF
1074 DF_NOP,
1075
1076 // 15C OP_UNUSED_5CFF
1077 DF_NOP,
1078
1079 // 15D OP_UNUSED_5DFF
1080 DF_NOP,
1081
1082 // 15E OP_UNUSED_5EFF
1083 DF_NOP,
1084
1085 // 15F OP_UNUSED_5FFF
1086 DF_NOP,
1087
1088 // 160 OP_UNUSED_60FF
1089 DF_NOP,
1090
1091 // 161 OP_UNUSED_61FF
1092 DF_NOP,
1093
1094 // 162 OP_UNUSED_62FF
1095 DF_NOP,
1096
1097 // 163 OP_UNUSED_63FF
1098 DF_NOP,
1099
1100 // 164 OP_UNUSED_64FF
1101 DF_NOP,
1102
1103 // 165 OP_UNUSED_65FF
1104 DF_NOP,
1105
1106 // 166 OP_UNUSED_66FF
1107 DF_NOP,
1108
1109 // 167 OP_UNUSED_67FF
1110 DF_NOP,
1111
1112 // 168 OP_UNUSED_68FF
1113 DF_NOP,
1114
1115 // 169 OP_UNUSED_69FF
1116 DF_NOP,
1117
1118 // 16A OP_UNUSED_6AFF
1119 DF_NOP,
1120
1121 // 16B OP_UNUSED_6BFF
1122 DF_NOP,
1123
1124 // 16C OP_UNUSED_6CFF
1125 DF_NOP,
1126
1127 // 16D OP_UNUSED_6DFF
1128 DF_NOP,
1129
1130 // 16E OP_UNUSED_6EFF
1131 DF_NOP,
1132
1133 // 16F OP_UNUSED_6FFF
1134 DF_NOP,
1135
1136 // 170 OP_UNUSED_70FF
1137 DF_NOP,
1138
1139 // 171 OP_UNUSED_71FF
1140 DF_NOP,
1141
1142 // 172 OP_UNUSED_72FF
1143 DF_NOP,
1144
1145 // 173 OP_UNUSED_73FF
1146 DF_NOP,
1147
1148 // 174 OP_UNUSED_74FF
1149 DF_NOP,
1150
1151 // 175 OP_UNUSED_75FF
1152 DF_NOP,
1153
1154 // 176 OP_UNUSED_76FF
1155 DF_NOP,
1156
1157 // 177 OP_UNUSED_77FF
1158 DF_NOP,
1159
1160 // 178 OP_UNUSED_78FF
1161 DF_NOP,
1162
1163 // 179 OP_UNUSED_79FF
1164 DF_NOP,
1165
1166 // 17A OP_UNUSED_7AFF
1167 DF_NOP,
1168
1169 // 17B OP_UNUSED_7BFF
1170 DF_NOP,
1171
1172 // 17C OP_UNUSED_7CFF
1173 DF_NOP,
1174
1175 // 17D OP_UNUSED_7DFF
1176 DF_NOP,
1177
1178 // 17E OP_UNUSED_7EFF
1179 DF_NOP,
1180
1181 // 17F OP_UNUSED_7FFF
1182 DF_NOP,
1183
1184 // 180 OP_UNUSED_80FF
1185 DF_NOP,
1186
1187 // 181 OP_UNUSED_81FF
1188 DF_NOP,
1189
1190 // 182 OP_UNUSED_82FF
1191 DF_NOP,
1192
1193 // 183 OP_UNUSED_83FF
1194 DF_NOP,
1195
1196 // 184 OP_UNUSED_84FF
1197 DF_NOP,
1198
1199 // 185 OP_UNUSED_85FF
1200 DF_NOP,
1201
1202 // 186 OP_UNUSED_86FF
1203 DF_NOP,
1204
1205 // 187 OP_UNUSED_87FF
1206 DF_NOP,
1207
1208 // 188 OP_UNUSED_88FF
1209 DF_NOP,
1210
1211 // 189 OP_UNUSED_89FF
1212 DF_NOP,
1213
1214 // 18A OP_UNUSED_8AFF
1215 DF_NOP,
1216
1217 // 18B OP_UNUSED_8BFF
1218 DF_NOP,
1219
1220 // 18C OP_UNUSED_8CFF
1221 DF_NOP,
1222
1223 // 18D OP_UNUSED_8DFF
1224 DF_NOP,
1225
1226 // 18E OP_UNUSED_8EFF
1227 DF_NOP,
1228
1229 // 18F OP_UNUSED_8FFF
1230 DF_NOP,
1231
1232 // 190 OP_UNUSED_90FF
1233 DF_NOP,
1234
1235 // 191 OP_UNUSED_91FF
1236 DF_NOP,
1237
1238 // 192 OP_UNUSED_92FF
1239 DF_NOP,
1240
1241 // 193 OP_UNUSED_93FF
1242 DF_NOP,
1243
1244 // 194 OP_UNUSED_94FF
1245 DF_NOP,
1246
1247 // 195 OP_UNUSED_95FF
1248 DF_NOP,
1249
1250 // 196 OP_UNUSED_96FF
1251 DF_NOP,
1252
1253 // 197 OP_UNUSED_97FF
1254 DF_NOP,
1255
1256 // 198 OP_UNUSED_98FF
1257 DF_NOP,
1258
1259 // 199 OP_UNUSED_99FF
1260 DF_NOP,
1261
1262 // 19A OP_UNUSED_9AFF
1263 DF_NOP,
1264
1265 // 19B OP_UNUSED_9BFF
1266 DF_NOP,
1267
1268 // 19C OP_UNUSED_9CFF
1269 DF_NOP,
1270
1271 // 19D OP_UNUSED_9DFF
1272 DF_NOP,
1273
1274 // 19E OP_UNUSED_9EFF
1275 DF_NOP,
1276
1277 // 19F OP_UNUSED_9FFF
1278 DF_NOP,
1279
1280 // 1A0 OP_UNUSED_A0FF
1281 DF_NOP,
1282
1283 // 1A1 OP_UNUSED_A1FF
1284 DF_NOP,
1285
1286 // 1A2 OP_UNUSED_A2FF
1287 DF_NOP,
1288
1289 // 1A3 OP_UNUSED_A3FF
1290 DF_NOP,
1291
1292 // 1A4 OP_UNUSED_A4FF
1293 DF_NOP,
1294
1295 // 1A5 OP_UNUSED_A5FF
1296 DF_NOP,
1297
1298 // 1A6 OP_UNUSED_A6FF
1299 DF_NOP,
1300
1301 // 1A7 OP_UNUSED_A7FF
1302 DF_NOP,
1303
1304 // 1A8 OP_UNUSED_A8FF
1305 DF_NOP,
1306
1307 // 1A9 OP_UNUSED_A9FF
1308 DF_NOP,
1309
1310 // 1AA OP_UNUSED_AAFF
1311 DF_NOP,
1312
1313 // 1AB OP_UNUSED_ABFF
1314 DF_NOP,
1315
1316 // 1AC OP_UNUSED_ACFF
1317 DF_NOP,
1318
1319 // 1AD OP_UNUSED_ADFF
1320 DF_NOP,
1321
1322 // 1AE OP_UNUSED_AEFF
1323 DF_NOP,
1324
1325 // 1AF OP_UNUSED_AFFF
1326 DF_NOP,
1327
1328 // 1B0 OP_UNUSED_B0FF
1329 DF_NOP,
1330
1331 // 1B1 OP_UNUSED_B1FF
1332 DF_NOP,
1333
1334 // 1B2 OP_UNUSED_B2FF
1335 DF_NOP,
1336
1337 // 1B3 OP_UNUSED_B3FF
1338 DF_NOP,
1339
1340 // 1B4 OP_UNUSED_B4FF
1341 DF_NOP,
1342
1343 // 1B5 OP_UNUSED_B5FF
1344 DF_NOP,
1345
1346 // 1B6 OP_UNUSED_B6FF
1347 DF_NOP,
1348
1349 // 1B7 OP_UNUSED_B7FF
1350 DF_NOP,
1351
1352 // 1B8 OP_UNUSED_B8FF
1353 DF_NOP,
1354
1355 // 1B9 OP_UNUSED_B9FF
1356 DF_NOP,
1357
1358 // 1BA OP_UNUSED_BAFF
1359 DF_NOP,
1360
1361 // 1BB OP_UNUSED_BBFF
1362 DF_NOP,
1363
1364 // 1BC OP_UNUSED_BCFF
1365 DF_NOP,
1366
1367 // 1BD OP_UNUSED_BDFF
1368 DF_NOP,
1369
1370 // 1BE OP_UNUSED_BEFF
1371 DF_NOP,
1372
1373 // 1BF OP_UNUSED_BFFF
1374 DF_NOP,
1375
1376 // 1C0 OP_UNUSED_C0FF
1377 DF_NOP,
1378
1379 // 1C1 OP_UNUSED_C1FF
1380 DF_NOP,
1381
1382 // 1C2 OP_UNUSED_C2FF
1383 DF_NOP,
1384
1385 // 1C3 OP_UNUSED_C3FF
1386 DF_NOP,
1387
1388 // 1C4 OP_UNUSED_C4FF
1389 DF_NOP,
1390
1391 // 1C5 OP_UNUSED_C5FF
1392 DF_NOP,
1393
1394 // 1C6 OP_UNUSED_C6FF
1395 DF_NOP,
1396
1397 // 1C7 OP_UNUSED_C7FF
1398 DF_NOP,
1399
1400 // 1C8 OP_UNUSED_C8FF
1401 DF_NOP,
1402
1403 // 1C9 OP_UNUSED_C9FF
1404 DF_NOP,
1405
1406 // 1CA OP_UNUSED_CAFF
1407 DF_NOP,
1408
1409 // 1CB OP_UNUSED_CBFF
1410 DF_NOP,
1411
1412 // 1CC OP_UNUSED_CCFF
1413 DF_NOP,
1414
1415 // 1CD OP_UNUSED_CDFF
1416 DF_NOP,
1417
1418 // 1CE OP_UNUSED_CEFF
1419 DF_NOP,
1420
1421 // 1CF OP_UNUSED_CFFF
1422 DF_NOP,
1423
1424 // 1D0 OP_UNUSED_D0FF
1425 DF_NOP,
1426
1427 // 1D1 OP_UNUSED_D1FF
1428 DF_NOP,
1429
1430 // 1D2 OP_UNUSED_D2FF
1431 DF_NOP,
1432
1433 // 1D3 OP_UNUSED_D3FF
1434 DF_NOP,
1435
1436 // 1D4 OP_UNUSED_D4FF
1437 DF_NOP,
1438
1439 // 1D5 OP_UNUSED_D5FF
1440 DF_NOP,
1441
1442 // 1D6 OP_UNUSED_D6FF
1443 DF_NOP,
1444
1445 // 1D7 OP_UNUSED_D7FF
1446 DF_NOP,
1447
1448 // 1D8 OP_UNUSED_D8FF
1449 DF_NOP,
1450
1451 // 1D9 OP_UNUSED_D9FF
1452 DF_NOP,
1453
1454 // 1DA OP_UNUSED_DAFF
1455 DF_NOP,
1456
1457 // 1DB OP_UNUSED_DBFF
1458 DF_NOP,
1459
1460 // 1DC OP_UNUSED_DCFF
1461 DF_NOP,
1462
1463 // 1DD OP_UNUSED_DDFF
1464 DF_NOP,
1465
1466 // 1DE OP_UNUSED_DEFF
1467 DF_NOP,
1468
1469 // 1DF OP_UNUSED_DFFF
1470 DF_NOP,
1471
1472 // 1E0 OP_UNUSED_E0FF
1473 DF_NOP,
1474
1475 // 1E1 OP_UNUSED_E1FF
1476 DF_NOP,
1477
1478 // 1E2 OP_UNUSED_E2FF
1479 DF_NOP,
1480
1481 // 1E3 OP_UNUSED_E3FF
1482 DF_NOP,
1483
1484 // 1E4 OP_UNUSED_E4FF
1485 DF_NOP,
1486
1487 // 1E5 OP_UNUSED_E5FF
1488 DF_NOP,
1489
1490 // 1E6 OP_UNUSED_E6FF
1491 DF_NOP,
1492
1493 // 1E7 OP_UNUSED_E7FF
1494 DF_NOP,
1495
1496 // 1E8 OP_UNUSED_E8FF
1497 DF_NOP,
1498
1499 // 1E9 OP_UNUSED_E9FF
1500 DF_NOP,
1501
1502 // 1EA OP_UNUSED_EAFF
1503 DF_NOP,
1504
1505 // 1EB OP_UNUSED_EBFF
1506 DF_NOP,
1507
1508 // 1EC OP_UNUSED_ECFF
1509 DF_NOP,
1510
1511 // 1ED OP_UNUSED_EDFF
1512 DF_NOP,
1513
1514 // 1EE OP_UNUSED_EEFF
1515 DF_NOP,
1516
1517 // 1EF OP_UNUSED_EFFF
1518 DF_NOP,
1519
1520 // 1F0 OP_UNUSED_F0FF
1521 DF_NOP,
1522
1523 // 1F1 OP_UNUSED_F1FF
1524 DF_NOP,
1525
1526 // 1F2 OP_INVOKE_OBJECT_INIT_JUMBO
1527 DF_NOP,
1528
1529 // 1F3 OP_IGET_VOLATILE_JUMBO
1530 DF_DA | DF_UB,
1531
1532 // 1F4 OP_IGET_WIDE_VOLATILE_JUMBO
1533 DF_DA_WIDE | DF_UB,
1534
1535 // 1F5 OP_IGET_OBJECT_VOLATILE_JUMBO
1536 DF_DA | DF_UB,
1537
1538 // 1F6 OP_IPUT_VOLATILE_JUMBO
1539 DF_UA | DF_UB,
1540
1541 // 1F7 OP_IPUT_WIDE_VOLATILE_JUMBO
1542 DF_UA_WIDE | DF_UB,
1543
1544 // 1F8 OP_IPUT_OBJECT_VOLATILE_JUMBO
1545 DF_UA | DF_UB,
1546
1547 // 1F9 OP_SGET_VOLATILE_JUMBO
1548 DF_DA,
1549
1550 // 1FA OP_SGET_WIDE_VOLATILE_JUMBO
1551 DF_DA_WIDE,
1552
1553 // 1FB OP_SGET_OBJECT_VOLATILE_JUMBO
1554 DF_DA,
1555
1556 // 1FC OP_SPUT_VOLATILE_JUMBO
1557 DF_UA,
1558
1559 // 1FD OP_SPUT_WIDE_VOLATILE_JUMBO
1560 DF_UA_WIDE,
1561
1562 // 1FE OP_SPUT_OBJECT_VOLATILE_JUMBO
1563 DF_UA,
1564
1565 // 1FF OP_THROW_VERIFICATION_ERROR_JUMBO
1566 DF_NOP,
1567
1568 // Beginning of extended MIR opcodes
1569 // 200 OP_MIR_PHI
1570 DF_PHI | DF_DA,
1571 /*
1572 * For extended MIR inserted at the MIR2LIR stage, it is okay to have
1573 * undefined values here.
1574 */
1575};
1576
1577/* Return the Dalvik register/subscript pair of a given SSA register */
1578int oatConvertSSARegToDalvik(const CompilationUnit* cUnit, int ssaReg)
1579{
1580 return GET_ELEM_N(cUnit->ssaToDalvikMap, int, ssaReg);
1581}
1582
1583/*
1584 * Utility function to convert encoded SSA register value into Dalvik register
1585 * and subscript pair. Each SSA register can be used to index the
1586 * ssaToDalvikMap list to get the subscript[31..16]/dalvik_reg[15..0] mapping.
1587 */
1588char *oatGetDalvikDisassembly(const DecodedInstruction* insn,
1589 const char* note)
1590{
1591 char buffer[256];
1592 Opcode opcode = insn->opcode;
1593 int dfAttributes = oatDataFlowAttributes[opcode];
1594 int flags;
1595 char* ret;
1596
1597 buffer[0] = 0;
1598 if ((int)opcode >= (int)kMirOpFirst) {
1599 if ((int)opcode == (int)kMirOpPhi) {
1600 strcpy(buffer, "PHI");
1601 }
1602 else {
1603 sprintf(buffer, "Opcode %#x", opcode);
1604 }
1605 flags = 0;
1606 } else {
1607 strcpy(buffer, dexGetOpcodeName(opcode));
1608 flags = dexGetFlagsFromOpcode(insn->opcode);
1609 }
1610
1611 if (note)
1612 strcat(buffer, note);
1613
1614 /* For branches, decode the instructions to print out the branch targets */
1615 if (flags & kInstrCanBranch) {
1616 InstructionFormat dalvikFormat = dexGetFormatFromOpcode(insn->opcode);
1617 int offset = 0;
1618 switch (dalvikFormat) {
1619 case kFmt21t:
1620 snprintf(buffer + strlen(buffer), 256, " v%d,", insn->vA);
1621 offset = (int) insn->vB;
1622 break;
1623 case kFmt22t:
1624 snprintf(buffer + strlen(buffer), 256, " v%d, v%d,",
1625 insn->vA, insn->vB);
1626 offset = (int) insn->vC;
1627 break;
1628 case kFmt10t:
1629 case kFmt20t:
1630 case kFmt30t:
1631 offset = (int) insn->vA;
1632 break;
1633 default:
1634 LOG(FATAL) << "Unexpected branch format " << (int)dalvikFormat
1635 << " / opcode " << (int)opcode;
1636 }
1637 snprintf(buffer + strlen(buffer), 256, " (%c%x)",
1638 offset > 0 ? '+' : '-',
1639 offset > 0 ? offset : -offset);
1640 } else if (dfAttributes & DF_FORMAT_35C) {
1641 unsigned int i;
1642 for (i = 0; i < insn->vA; i++) {
1643 if (i != 0) strcat(buffer, ",");
1644 snprintf(buffer + strlen(buffer), 256, " v%d", insn->arg[i]);
1645 }
1646 }
1647 else if (dfAttributes & DF_FORMAT_3RC) {
1648 snprintf(buffer + strlen(buffer), 256,
1649 " v%d..v%d", insn->vC, insn->vC + insn->vA - 1);
1650 }
1651 else {
1652 if (dfAttributes & DF_A_IS_REG) {
1653 snprintf(buffer + strlen(buffer), 256, " v%d", insn->vA);
1654 }
1655 if (dfAttributes & DF_B_IS_REG) {
1656 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vB);
1657 }
1658 else if ((int)opcode < (int)kMirOpFirst) {
1659 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vB);
1660 }
1661 if (dfAttributes & DF_C_IS_REG) {
1662 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vC);
1663 }
1664 else if ((int)opcode < (int)kMirOpFirst) {
1665 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vC);
1666 }
1667 }
1668 int length = strlen(buffer) + 1;
1669 ret = (char *)oatNew(length, false);
1670 memcpy(ret, buffer, length);
1671 return ret;
1672}
1673
1674char *getSSAName(const CompilationUnit* cUnit, int ssaReg, char* name)
1675{
1676 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaReg);
1677
1678 sprintf(name, "v%d_%d",
1679 DECODE_REG(ssa2DalvikValue), DECODE_SUB(ssa2DalvikValue));
1680 return name;
1681}
1682
1683/*
1684 * Dalvik instruction disassembler with optional SSA printing.
1685 */
1686char *oatFullDisassembler(const CompilationUnit* cUnit,
1687 const MIR* mir)
1688{
1689 char buffer[256];
1690 char operand0[256], operand1[256];
1691 const DecodedInstruction *insn = &mir->dalvikInsn;
1692 int opcode = insn->opcode;
1693 int dfAttributes = oatDataFlowAttributes[opcode];
1694 char *ret;
1695 int length;
1696 OpcodeFlags flags;
1697
1698 buffer[0] = 0;
1699 if (opcode >= kMirOpFirst) {
1700 if (opcode == kMirOpPhi) {
1701 snprintf(buffer, 256, "PHI %s = (%s",
1702 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
1703 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
1704 int i;
1705 for (i = 1; i < mir->ssaRep->numUses; i++) {
1706 snprintf(buffer + strlen(buffer), 256, ", %s",
1707 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
1708 }
1709 snprintf(buffer + strlen(buffer), 256, ")");
1710 }
1711 else {
1712 sprintf(buffer, "Opcode %#x", opcode);
1713 }
1714 goto done;
1715 } else {
1716 strcpy(buffer, dexGetOpcodeName((Opcode)opcode));
1717 }
1718
1719 flags = dexGetFlagsFromOpcode((Opcode)opcode);
1720 /* For branches, decode the instructions to print out the branch targets */
1721 if (flags & kInstrCanBranch) {
1722 InstructionFormat dalvikFormat = dexGetFormatFromOpcode(insn->opcode);
1723 int delta = 0;
1724 switch (dalvikFormat) {
1725 case kFmt21t:
1726 snprintf(buffer + strlen(buffer), 256, " %s, ",
1727 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
1728 delta = (int) insn->vB;
1729 break;
1730 case kFmt22t:
1731 snprintf(buffer + strlen(buffer), 256, " %s, %s, ",
1732 getSSAName(cUnit, mir->ssaRep->uses[0], operand0),
1733 getSSAName(cUnit, mir->ssaRep->uses[1], operand1));
1734 delta = (int) insn->vC;
1735 break;
1736 case kFmt10t:
1737 case kFmt20t:
1738 case kFmt30t:
1739 delta = (int) insn->vA;
1740 break;
1741 default:
1742 LOG(FATAL) << "Unexpected branch format: " <<
1743 (int)dalvikFormat;
1744 }
1745 snprintf(buffer + strlen(buffer), 256, " %04x",
1746 mir->offset + delta);
1747 } else if (dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) {
1748 unsigned int i;
1749 for (i = 0; i < insn->vA; i++) {
1750 if (i != 0) strcat(buffer, ",");
1751 snprintf(buffer + strlen(buffer), 256, " %s",
1752 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
1753 }
1754 } else {
1755 int udIdx;
1756 if (mir->ssaRep->numDefs) {
1757
1758 for (udIdx = 0; udIdx < mir->ssaRep->numDefs; udIdx++) {
1759 snprintf(buffer + strlen(buffer), 256, " %s",
1760 getSSAName(cUnit, mir->ssaRep->defs[udIdx], operand0));
1761 }
1762 strcat(buffer, ",");
1763 }
1764 if (mir->ssaRep->numUses) {
1765 /* No leading ',' for the first use */
1766 snprintf(buffer + strlen(buffer), 256, " %s",
1767 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
1768 for (udIdx = 1; udIdx < mir->ssaRep->numUses; udIdx++) {
1769 snprintf(buffer + strlen(buffer), 256, ", %s",
1770 getSSAName(cUnit, mir->ssaRep->uses[udIdx], operand0));
1771 }
1772 }
1773 if (opcode < kMirOpFirst) {
1774 InstructionFormat dalvikFormat =
1775 dexGetFormatFromOpcode((Opcode)opcode);
1776 switch (dalvikFormat) {
1777 case kFmt11n: // op vA, #+B
1778 case kFmt21s: // op vAA, #+BBBB
1779 case kFmt21h: // op vAA, #+BBBB00000[00000000]
1780 case kFmt31i: // op vAA, #+BBBBBBBB
1781 case kFmt51l: // op vAA, #+BBBBBBBBBBBBBBBB
1782 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vB);
1783 break;
1784 case kFmt21c: // op vAA, thing@BBBB
1785 case kFmt31c: // op vAA, thing@BBBBBBBB
1786 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vB);
1787 break;
1788 case kFmt22b: // op vAA, vBB, #+CC
1789 case kFmt22s: // op vA, vB, #+CCCC
1790 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vC);
1791 break;
1792 case kFmt22c: // op vA, vB, thing@CCCC
1793 case kFmt22cs: // [opt] op vA, vB, field offset CCCC
1794 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vC);
1795 break;
1796 /* No need for special printing */
1797 default:
1798 break;
1799 }
1800 }
1801 }
1802
1803done:
1804 length = strlen(buffer) + 1;
1805 ret = (char *) oatNew(length, false);
1806 memcpy(ret, buffer, length);
1807 return ret;
1808}
1809
1810/*
1811 * Utility function to convert encoded SSA register value into Dalvik register
1812 * and subscript pair. Each SSA register can be used to index the
1813 * ssaToDalvikMap list to get the subscript[31..16]/dalvik_reg[15..0] mapping.
1814 */
1815char *oatGetSSAString(CompilationUnit* cUnit, SSARepresentation* ssaRep)
1816{
1817 char buffer[256];
1818 char* ret;
1819 int i;
1820
1821 buffer[0] = 0;
1822 for (i = 0; i < ssaRep->numDefs; i++) {
1823 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaRep->defs[i]);
1824
1825 sprintf(buffer + strlen(buffer), "s%d(v%d_%d) ",
1826 ssaRep->defs[i], DECODE_REG(ssa2DalvikValue),
1827 DECODE_SUB(ssa2DalvikValue));
1828 }
1829
1830 if (ssaRep->numDefs) {
1831 strcat(buffer, "<- ");
1832 }
1833
1834 for (i = 0; i < ssaRep->numUses; i++) {
1835 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaRep->uses[i]);
1836 int len = strlen(buffer);
1837
1838 if (snprintf(buffer + len, 250 - len, "s%d(v%d_%d) ",
1839 ssaRep->uses[i], DECODE_REG(ssa2DalvikValue),
1840 DECODE_SUB(ssa2DalvikValue)) >= (250 - len)) {
1841 strcat(buffer, "...");
1842 break;
1843 }
1844 }
1845
1846 int length = strlen(buffer) + 1;
1847 ret = (char *)oatNew(length, false);
1848 memcpy(ret, buffer, length);
1849 return ret;
1850}
1851
1852/* Any register that is used before being defined is considered live-in */
1853static inline void handleLiveInUse(ArenaBitVector* useV, ArenaBitVector* defV,
1854 ArenaBitVector* liveInV, int dalvikRegId)
1855{
1856 oatSetBit(useV, dalvikRegId);
1857 if (!oatIsBitSet(defV, dalvikRegId)) {
1858 oatSetBit(liveInV, dalvikRegId);
1859 }
1860}
1861
1862/* Mark a reg as being defined */
1863static inline void handleDef(ArenaBitVector* defV, int dalvikRegId)
1864{
1865 oatSetBit(defV, dalvikRegId);
1866}
1867
1868/*
1869 * Find out live-in variables for natural loops. Variables that are live-in in
1870 * the main loop body are considered to be defined in the entry block.
1871 */
1872bool oatFindLocalLiveIn(CompilationUnit* cUnit, BasicBlock* bb)
1873{
1874 MIR* mir;
1875 ArenaBitVector *useV, *defV, *liveInV;
1876
1877 if (bb->dataFlowInfo == NULL) return false;
1878
1879 useV = bb->dataFlowInfo->useV =
1880 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1881 defV = bb->dataFlowInfo->defV =
1882 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1883 liveInV = bb->dataFlowInfo->liveInV =
1884 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1885
1886 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1887 int dfAttributes =
1888 oatDataFlowAttributes[mir->dalvikInsn.opcode];
1889 DecodedInstruction *dInsn = &mir->dalvikInsn;
1890
1891 if (dfAttributes & DF_HAS_USES) {
1892 if (dfAttributes & DF_UA) {
1893 handleLiveInUse(useV, defV, liveInV, dInsn->vA);
1894 } else if (dfAttributes & DF_UA_WIDE) {
1895 handleLiveInUse(useV, defV, liveInV, dInsn->vA);
1896 handleLiveInUse(useV, defV, liveInV, dInsn->vA+1);
1897 }
1898 if (dfAttributes & DF_UB) {
1899 handleLiveInUse(useV, defV, liveInV, dInsn->vB);
1900 } else if (dfAttributes & DF_UB_WIDE) {
1901 handleLiveInUse(useV, defV, liveInV, dInsn->vB);
1902 handleLiveInUse(useV, defV, liveInV, dInsn->vB+1);
1903 }
1904 if (dfAttributes & DF_UC) {
1905 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
1906 } else if (dfAttributes & DF_UC_WIDE) {
1907 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
1908 handleLiveInUse(useV, defV, liveInV, dInsn->vC+1);
1909 }
1910 }
1911 if (dfAttributes & DF_HAS_DEFS) {
1912 handleDef(defV, dInsn->vA);
1913 if (dfAttributes & DF_DA_WIDE) {
1914 handleDef(defV, dInsn->vA+1);
1915 }
1916 }
1917 }
1918 return true;
1919}
1920
1921/* Find out the latest SSA register for a given Dalvik register */
1922static void handleSSAUse(CompilationUnit* cUnit, int* uses, int dalvikReg,
1923 int regIndex)
1924{
1925 int encodedValue = cUnit->dalvikToSSAMap[dalvikReg];
1926 int ssaReg = DECODE_REG(encodedValue);
1927 uses[regIndex] = ssaReg;
1928}
1929
1930/* Setup a new SSA register for a given Dalvik register */
1931static void handleSSADef(CompilationUnit* cUnit, int* defs, int dalvikReg,
1932 int regIndex)
1933{
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1934 int ssaReg = cUnit->numSSARegs++;
1935 /* Bump up the subscript */
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1936 int dalvikSub = ++cUnit->SSALastDefs[dalvikReg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1937 int newD2SMapping = ENCODE_REG_SUB(ssaReg, dalvikSub);
1938
1939 cUnit->dalvikToSSAMap[dalvikReg] = newD2SMapping;
1940
1941 int newS2DMapping = ENCODE_REG_SUB(dalvikReg, dalvikSub);
1942 oatInsertGrowableList(cUnit->ssaToDalvikMap, newS2DMapping);
1943
1944 defs[regIndex] = ssaReg;
1945}
1946
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1947/* Look up new SSA names for format_35c instructions */
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1948static void dataFlowSSAFormat35C(CompilationUnit* cUnit, MIR* mir)
1949{
1950 DecodedInstruction *dInsn = &mir->dalvikInsn;
1951 int numUses = dInsn->vA;
1952 int i;
1953
1954 mir->ssaRep->numUses = numUses;
1955 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses, false);
1956
1957 for (i = 0; i < numUses; i++) {
1958 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->arg[i], i);
1959 }
1960}
1961
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1962/* Look up new SSA names for format_3rc instructions */
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1963static void dataFlowSSAFormat3RC(CompilationUnit* cUnit, MIR* mir)
1964{
1965 DecodedInstruction *dInsn = &mir->dalvikInsn;
1966 int numUses = dInsn->vA;
1967 int i;
1968
1969 mir->ssaRep->numUses = numUses;
1970 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses, false);
1971
1972 for (i = 0; i < numUses; i++) {
1973 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+i, i);
1974 }
1975}
1976
1977/* Entry function to convert a block into SSA representation */
1978bool oatDoSSAConversion(CompilationUnit* cUnit, BasicBlock* bb)
1979{
1980 MIR* mir;
1981
1982 if (bb->dataFlowInfo == NULL) return false;
1983
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1984 if (cUnit->printMeVerbose) {
1985 LOG(INFO) << "oatDoSSAConversion processing block " << bb->id;
1986 }
1987
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1988 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1989 mir->ssaRep = (struct SSARepresentation *)
1990 oatNew(sizeof(SSARepresentation), true);
1991
1992 int dfAttributes =
1993 oatDataFlowAttributes[mir->dalvikInsn.opcode];
1994
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1995 // If not a pseudo-op, note non-leaf or can throw
1996 if (mir->dalvikInsn.opcode < kNumPackedOpcodes) {
1997 int flags = dexGetFlagsFromOpcode(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1998
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1999 if (flags & kInstrCanThrow) {
2000 cUnit->attrs &= ~METHOD_IS_THROW_FREE;
2001 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]2002
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]2003 if (flags & kInstrInvoke) {
2004 cUnit->attrs &= ~METHOD_IS_LEAF;
2005 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]2006 }
2007
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2008 int numUses = 0;
2009
2010 if (dfAttributes & DF_FORMAT_35C) {
2011 dataFlowSSAFormat35C(cUnit, mir);
2012 continue;
2013 }
2014
2015 if (dfAttributes & DF_FORMAT_3RC) {
2016 dataFlowSSAFormat3RC(cUnit, mir);
2017 continue;
2018 }
2019
2020 if (dfAttributes & DF_HAS_USES) {
2021 if (dfAttributes & DF_UA) {
2022 numUses++;
2023 } else if (dfAttributes & DF_UA_WIDE) {
2024 numUses += 2;
2025 }
2026 if (dfAttributes & DF_UB) {
2027 numUses++;
2028 } else if (dfAttributes & DF_UB_WIDE) {
2029 numUses += 2;
2030 }
2031 if (dfAttributes & DF_UC) {
2032 numUses++;
2033 } else if (dfAttributes & DF_UC_WIDE) {
2034 numUses += 2;
2035 }
2036 }
2037
2038 if (numUses) {
2039 mir->ssaRep->numUses = numUses;
2040 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses,
2041 false);
2042 mir->ssaRep->fpUse = (bool *)oatNew(sizeof(bool) * numUses,
2043 false);
2044 }
2045
2046 int numDefs = 0;
2047
2048 if (dfAttributes & DF_HAS_DEFS) {
2049 numDefs++;
2050 if (dfAttributes & DF_DA_WIDE) {
2051 numDefs++;
2052 }
2053 }
2054
2055 if (numDefs) {
2056 mir->ssaRep->numDefs = numDefs;
2057 mir->ssaRep->defs = (int *)oatNew(sizeof(int) * numDefs,
2058 false);
2059 mir->ssaRep->fpDef = (bool *)oatNew(sizeof(bool) * numDefs,
2060 false);
2061 }
2062
2063 DecodedInstruction *dInsn = &mir->dalvikInsn;
2064
2065 if (dfAttributes & DF_HAS_USES) {
2066 numUses = 0;
2067 if (dfAttributes & DF_UA) {
2068 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2069 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
2070 } else if (dfAttributes & DF_UA_WIDE) {
2071 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2072 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
2073 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2074 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA+1, numUses++);
2075 }
2076 if (dfAttributes & DF_UB) {
2077 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2078 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
2079 } else if (dfAttributes & DF_UB_WIDE) {
2080 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2081 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
2082 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2083 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB+1, numUses++);
2084 }
2085 if (dfAttributes & DF_UC) {
2086 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2087 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
2088 } else if (dfAttributes & DF_UC_WIDE) {
2089 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2090 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
2091 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2092 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+1, numUses++);
2093 }
2094 }
2095 if (dfAttributes & DF_HAS_DEFS) {
2096 mir->ssaRep->fpDef[0] = dfAttributes & DF_FP_A;
2097 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA, 0);
2098 if (dfAttributes & DF_DA_WIDE) {
2099 mir->ssaRep->fpDef[1] = dfAttributes & DF_FP_A;
2100 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA+1, 1);
2101 }
2102 }
2103 }
2104
2105 /*
2106 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
2107 * input to PHI nodes can be derived from the snapshot of all predecessor
2108 * blocks.
2109 */
2110 bb->dataFlowInfo->dalvikToSSAMap =
Ian Rogers0cfe1fb2011-08-26 03:29:44 -0700[diff] [blame]2111 (int *)oatNew(sizeof(int) * cUnit->method->NumRegisters(),
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2112 false);
2113
2114 memcpy(bb->dataFlowInfo->dalvikToSSAMap, cUnit->dalvikToSSAMap,
Ian Rogers0cfe1fb2011-08-26 03:29:44 -0700[diff] [blame]2115 sizeof(int) * cUnit->method->NumRegisters());
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2116 return true;
2117}
2118
2119/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
2120static void setConstant(CompilationUnit* cUnit, int ssaReg, int value)
2121{
2122 oatSetBit(cUnit->isConstantV, ssaReg);
2123 cUnit->constantValues[ssaReg] = value;
2124}
2125
2126bool oatDoConstantPropagation(CompilationUnit* cUnit, BasicBlock* bb)
2127{
2128 MIR* mir;
2129 ArenaBitVector *isConstantV = cUnit->isConstantV;
2130
2131 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
2132 int dfAttributes =
2133 oatDataFlowAttributes[mir->dalvikInsn.opcode];
2134
2135 DecodedInstruction *dInsn = &mir->dalvikInsn;
2136
2137 if (!(dfAttributes & DF_HAS_DEFS)) continue;
2138
2139 /* Handle instructions that set up constants directly */
2140 if (dfAttributes & DF_SETS_CONST) {
2141 if (dfAttributes & DF_DA) {
2142 switch (dInsn->opcode) {
2143 case OP_CONST_4:
2144 case OP_CONST_16:
2145 case OP_CONST:
2146 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
2147 break;
2148 case OP_CONST_HIGH16:
2149 setConstant(cUnit, mir->ssaRep->defs[0],
2150 dInsn->vB << 16);
2151 break;
2152 default:
2153 break;
2154 }
2155 } else if (dfAttributes & DF_DA_WIDE) {
2156 switch (dInsn->opcode) {
2157 case OP_CONST_WIDE_16:
2158 case OP_CONST_WIDE_32:
2159 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
2160 setConstant(cUnit, mir->ssaRep->defs[1], 0);
2161 break;
2162 case OP_CONST_WIDE:
2163 setConstant(cUnit, mir->ssaRep->defs[0],
2164 (int) dInsn->vB_wide);
2165 setConstant(cUnit, mir->ssaRep->defs[1],
2166 (int) (dInsn->vB_wide >> 32));
2167 break;
2168 case OP_CONST_WIDE_HIGH16:
2169 setConstant(cUnit, mir->ssaRep->defs[0], 0);
2170 setConstant(cUnit, mir->ssaRep->defs[1],
2171 dInsn->vB << 16);
2172 break;
2173 default:
2174 break;
2175 }
2176 }
2177 /* Handle instructions that set up constants directly */
2178 } else if (dfAttributes & DF_IS_MOVE) {
2179 int i;
2180
2181 for (i = 0; i < mir->ssaRep->numUses; i++) {
2182 if (!oatIsBitSet(isConstantV, mir->ssaRep->uses[i])) break;
2183 }
2184 /* Move a register holding a constant to another register */
2185 if (i == mir->ssaRep->numUses) {
2186 setConstant(cUnit, mir->ssaRep->defs[0],
2187 cUnit->constantValues[mir->ssaRep->uses[0]]);
2188 if (dfAttributes & DF_DA_WIDE) {
2189 setConstant(cUnit, mir->ssaRep->defs[1],
2190 cUnit->constantValues[mir->ssaRep->uses[1]]);
2191 }
2192 }
2193 }
2194 }
2195 /* TODO: implement code to handle arithmetic operations */
2196 return true;
2197}
2198
2199/* Setup the basic data structures for SSA conversion */
2200void oatInitializeSSAConversion(CompilationUnit* cUnit)
2201{
2202 int i;
Ian Rogers0cfe1fb2011-08-26 03:29:44 -0700[diff] [blame]2203 int numDalvikReg = cUnit->method->NumRegisters();
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2204
2205 cUnit->ssaToDalvikMap = (GrowableList *)oatNew(sizeof(GrowableList),
2206 false);
2207 oatInitGrowableList(cUnit->ssaToDalvikMap, numDalvikReg);
2208
2209 /*
2210 * Initial number of SSA registers is equal to the number of Dalvik
2211 * registers.
2212 */
2213 cUnit->numSSARegs = numDalvikReg;
2214
2215 /*
2216 * Initialize the SSA2Dalvik map list. For the first numDalvikReg elements,
2217 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
2218 * into "(0 << 16) | i"
2219 */
2220 for (i = 0; i < numDalvikReg; i++) {
2221 oatInsertGrowableList(cUnit->ssaToDalvikMap, ENCODE_REG_SUB(i, 0));
2222 }
2223
2224 /*
2225 * Initialize the DalvikToSSAMap map. The low 16 bit is the SSA register id,
2226 * while the high 16 bit is the current subscript. The original Dalvik
2227 * register N is mapped to SSA register N with subscript 0.
2228 */
2229 cUnit->dalvikToSSAMap = (int *)oatNew(sizeof(int) * numDalvikReg,
2230 false);
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]2231 /* Keep track of the higest def for each dalvik reg */
2232 cUnit->SSALastDefs = (int *)oatNew(sizeof(int) * numDalvikReg,
2233 false);
2234
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2235 for (i = 0; i < numDalvikReg; i++) {
2236 cUnit->dalvikToSSAMap[i] = i;
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]2237 cUnit->SSALastDefs[i] = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]2238 }
2239
2240 /*
2241 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
2242 */
2243 GrowableListIterator iterator;
2244
2245 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
2246
2247 while (true) {
2248 BasicBlock* bb = (BasicBlock *) oatGrowableListIteratorNext(&iterator);
2249 if (bb == NULL) break;
2250 if (bb->hidden == true) continue;
2251 if (bb->blockType == kDalvikByteCode ||
2252 bb->blockType == kEntryBlock ||
2253 bb->blockType == kExitBlock) {
2254 bb->dataFlowInfo = (BasicBlockDataFlow *)
2255 oatNew(sizeof(BasicBlockDataFlow),
2256 true);
2257 }
2258 }
2259}
2260
2261/* Clear the visited flag for each BB */
2262bool oatClearVisitedFlag(struct CompilationUnit* cUnit,
2263 struct BasicBlock* bb)
2264{
2265 bb->visited = false;
2266 return true;
2267}
2268
2269void oatDataFlowAnalysisDispatcher(CompilationUnit* cUnit,
2270 bool (*func)(CompilationUnit*, BasicBlock*),
2271 DataFlowAnalysisMode dfaMode,
2272 bool isIterative)
2273{
2274 bool change = true;
2275
2276 while (change) {
2277 change = false;
2278
2279 /* Scan all blocks and perform the operations specified in func */
2280 if (dfaMode == kAllNodes) {
2281 GrowableListIterator iterator;
2282 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
2283 while (true) {
2284 BasicBlock* bb =
2285 (BasicBlock *) oatGrowableListIteratorNext(&iterator);
2286 if (bb == NULL) break;
2287 if (bb->hidden == true) continue;
2288 change |= (*func)(cUnit, bb);
2289 }
2290 }
2291 /*
2292 * Scan all reachable blocks and perform the operations specified in
2293 * func.
2294 */
2295 else if (dfaMode == kReachableNodes) {
2296 int numReachableBlocks = cUnit->numReachableBlocks;
2297 int idx;
2298 const GrowableList *blockList = &cUnit->blockList;
2299
2300 for (idx = 0; idx < numReachableBlocks; idx++) {
2301 int blockIdx = cUnit->dfsOrder.elemList[idx];
2302 BasicBlock* bb =
2303 (BasicBlock *) oatGrowableListGetElement(blockList,
2304 blockIdx);
2305 change |= (*func)(cUnit, bb);
2306 }
2307 }
2308 /*
2309 * Scan all reachable blocks by the pre-order in the depth-first-search
2310 * CFG and perform the operations specified in func.
2311 */
2312 else if (dfaMode == kPreOrderDFSTraversal) {
2313 int numReachableBlocks = cUnit->numReachableBlocks;
2314 int idx;
2315 const GrowableList *blockList = &cUnit->blockList;
2316
2317 for (idx = 0; idx < numReachableBlocks; idx++) {
2318 int dfsIdx = cUnit->dfsOrder.elemList[idx];
2319 BasicBlock* bb =
2320 (BasicBlock *) oatGrowableListGetElement(blockList, dfsIdx);
2321 change |= (*func)(cUnit, bb);
2322 }
2323 }
2324 /*
2325 * Scan all reachable blocks by the post-order in the depth-first-search
2326 * CFG and perform the operations specified in func.
2327 */
2328 else if (dfaMode == kPostOrderDFSTraversal) {
2329 int numReachableBlocks = cUnit->numReachableBlocks;
2330 int idx;
2331 const GrowableList *blockList = &cUnit->blockList;
2332
2333 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
2334 int dfsIdx = cUnit->dfsOrder.elemList[idx];
2335 BasicBlock* bb =
2336 (BasicBlock *) oatGrowableListGetElement(blockList, dfsIdx);
2337 change |= (*func)(cUnit, bb);
2338 }
2339 }
2340 /*
2341 * Scan all reachable blocks by the post-order in the dominator tree
2342 * and perform the operations specified in func.
2343 */
2344 else if (dfaMode == kPostOrderDOMTraversal) {
2345 int numReachableBlocks = cUnit->numReachableBlocks;
2346 int idx;
2347 const GrowableList *blockList = &cUnit->blockList;
2348
2349 for (idx = 0; idx < numReachableBlocks; idx++) {
2350 int domIdx = cUnit->domPostOrderTraversal.elemList[idx];
2351 BasicBlock* bb =
2352 (BasicBlock *) oatGrowableListGetElement(blockList, domIdx);
2353 change |= (*func)(cUnit, bb);
2354 }
2355 }
2356 /* If isIterative is false, exit the loop after the first iteration */
2357 change &= isIterative;
2358 }
2359}