| buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | /* |
| 18 | * This file contains arm-specific codegen factory support. |
| 19 | * It is included by |
| 20 | * |
| 21 | * Codegen-$(TARGET_ARCH_VARIANT).c |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * Perform a "reg cmp imm" operation and jump to the PCR region if condition |
| 27 | * satisfies. |
| 28 | */ |
| 29 | static TGT_LIR* genRegImmCheck(CompilationUnit* cUnit, |
| 30 | ArmConditionCode cond, int reg, |
| 31 | int checkValue, int dOffset, |
| 32 | TGT_LIR* pcrLabel) |
| 33 | { |
| 34 | TGT_LIR* branch = genCmpImmBranch(cUnit, cond, reg, checkValue); |
| 35 | BasicBlock* bb = cUnit->curBlock; |
| 36 | if (bb->taken) { |
| 37 | ArmLIR *exceptionLabel = (ArmLIR* ) cUnit->blockLabelList; |
| 38 | exceptionLabel += bb->taken->id; |
| 39 | branch->generic.target = (LIR* ) exceptionLabel; |
| 40 | return exceptionLabel; |
| 41 | } else { |
| 42 | LOG(FATAL) << "Catch blocks not handled yet"; |
| 43 | return NULL; // quiet gcc |
| 44 | } |
| 45 | } |
| 46 | |
| 47 | /* |
| 48 | * Perform null-check on a register. sReg is the ssa register being checked, |
| 49 | * and mReg is the machine register holding the actual value. If internal state |
| 50 | * indicates that sReg has been checked before the check request is ignored. |
| 51 | */ |
| 52 | static TGT_LIR* genNullCheck(CompilationUnit* cUnit, int sReg, int mReg, |
| 53 | int dOffset, TGT_LIR* pcrLabel) |
| 54 | { |
| 55 | /* This particular Dalvik register has been null-checked */ |
| 56 | if (oatIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) { |
| 57 | return pcrLabel; |
| 58 | } |
| 59 | oatSetBit(cUnit->regPool->nullCheckedRegs, sReg); |
| 60 | return genRegImmCheck(cUnit, kArmCondEq, mReg, 0, dOffset, pcrLabel); |
| 61 | } |
| 62 | |
| 63 | /* |
| 64 | * Perform a "reg cmp reg" operation and jump to the PCR region if condition |
| 65 | * satisfies. |
| 66 | */ |
| 67 | static TGT_LIR* genRegRegCheck(CompilationUnit* cUnit, |
| 68 | ArmConditionCode cond, |
| 69 | int reg1, int reg2, int dOffset, |
| 70 | TGT_LIR* pcrLabel) |
| 71 | { |
| 72 | TGT_LIR* res; |
| 73 | res = opRegReg(cUnit, kOpCmp, reg1, reg2); |
| 74 | TGT_LIR* branch = opCondBranch(cUnit, cond); |
| 75 | genCheckCommon(cUnit, dOffset, branch, pcrLabel); |
| 76 | return res; |
| 77 | } |
| 78 | |
| 79 | /* Perform bound check on two registers */ |
| 80 | static TGT_LIR* genBoundsCheck(CompilationUnit* cUnit, int rIndex, |
| 81 | int rBound, int dOffset, TGT_LIR* pcrLabel) |
| 82 | { |
| 83 | return genRegRegCheck(cUnit, kArmCondCs, rIndex, rBound, dOffset, |
| 84 | pcrLabel); |
| 85 | } |