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Anton Kirilov5ec62182016-10-13 20:16:02 +01001/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "intrinsics_arm_vixl.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
20#include "code_generator_arm_vixl.h"
21#include "common_arm.h"
22#include "lock_word.h"
23#include "mirror/array-inl.h"
24
25#include "aarch32/constants-aarch32.h"
26
27namespace art {
28namespace arm {
29
30#define __ assembler->GetVIXLAssembler()->
31
32using helpers::DRegisterFrom;
33using helpers::HighRegisterFrom;
34using helpers::InputDRegisterAt;
35using helpers::InputRegisterAt;
36using helpers::InputSRegisterAt;
37using helpers::InputVRegisterAt;
38using helpers::Int32ConstantFrom;
39using helpers::LocationFrom;
40using helpers::LowRegisterFrom;
41using helpers::LowSRegisterFrom;
42using helpers::OutputDRegister;
xueliang.zhongc032e742016-03-28 16:44:32 +010043using helpers::OutputSRegister;
Anton Kirilov5ec62182016-10-13 20:16:02 +010044using helpers::OutputRegister;
45using helpers::OutputVRegister;
46using helpers::RegisterFrom;
47using helpers::SRegisterFrom;
xueliang.zhongc032e742016-03-28 16:44:32 +010048using helpers::DRegisterFromS;
Anton Kirilov5ec62182016-10-13 20:16:02 +010049
50using namespace vixl::aarch32; // NOLINT(build/namespaces)
51
Artem Serov0fb37192016-12-06 18:13:40 +000052using vixl::ExactAssemblyScope;
53using vixl::CodeBufferCheckScope;
54
Anton Kirilov5ec62182016-10-13 20:16:02 +010055ArmVIXLAssembler* IntrinsicCodeGeneratorARMVIXL::GetAssembler() {
56 return codegen_->GetAssembler();
57}
58
59ArenaAllocator* IntrinsicCodeGeneratorARMVIXL::GetAllocator() {
60 return codegen_->GetGraph()->GetArena();
61}
62
63// Default slow-path for fallback (calling the managed code to handle the intrinsic) in an
64// intrinsified call. This will copy the arguments into the positions for a regular call.
65//
66// Note: The actual parameters are required to be in the locations given by the invoke's location
67// summary. If an intrinsic modifies those locations before a slowpath call, they must be
68// restored!
69//
70// Note: If an invoke wasn't sharpened, we will put down an invoke-virtual here. That's potentially
71// sub-optimal (compared to a direct pointer call), but this is a slow-path.
72
73class IntrinsicSlowPathARMVIXL : public SlowPathCodeARMVIXL {
74 public:
75 explicit IntrinsicSlowPathARMVIXL(HInvoke* invoke)
76 : SlowPathCodeARMVIXL(invoke), invoke_(invoke) {}
77
78 Location MoveArguments(CodeGenerator* codegen) {
Artem Serovd4cc5b22016-11-04 11:19:09 +000079 InvokeDexCallingConventionVisitorARMVIXL calling_convention_visitor;
Anton Kirilov5ec62182016-10-13 20:16:02 +010080 IntrinsicVisitor::MoveArguments(invoke_, codegen, &calling_convention_visitor);
81 return calling_convention_visitor.GetMethodLocation();
82 }
83
84 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
85 ArmVIXLAssembler* assembler = down_cast<ArmVIXLAssembler*>(codegen->GetAssembler());
86 __ Bind(GetEntryLabel());
87
88 SaveLiveRegisters(codegen, invoke_->GetLocations());
89
90 Location method_loc = MoveArguments(codegen);
91
92 if (invoke_->IsInvokeStaticOrDirect()) {
93 codegen->GenerateStaticOrDirectCall(invoke_->AsInvokeStaticOrDirect(), method_loc);
94 } else {
95 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), method_loc);
96 }
97 codegen->RecordPcInfo(invoke_, invoke_->GetDexPc(), this);
98
99 // Copy the result back to the expected output.
100 Location out = invoke_->GetLocations()->Out();
101 if (out.IsValid()) {
102 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory.
103 DCHECK(!invoke_->GetLocations()->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
104 codegen->MoveFromReturnRegister(out, invoke_->GetType());
105 }
106
107 RestoreLiveRegisters(codegen, invoke_->GetLocations());
108 __ B(GetExitLabel());
109 }
110
111 const char* GetDescription() const OVERRIDE { return "IntrinsicSlowPath"; }
112
113 private:
114 // The instruction where this slow path is happening.
115 HInvoke* const invoke_;
116
117 DISALLOW_COPY_AND_ASSIGN(IntrinsicSlowPathARMVIXL);
118};
119
120// Slow path implementing the SystemArrayCopy intrinsic copy loop with read barriers.
121class ReadBarrierSystemArrayCopySlowPathARMVIXL : public SlowPathCodeARMVIXL {
122 public:
123 explicit ReadBarrierSystemArrayCopySlowPathARMVIXL(HInstruction* instruction)
124 : SlowPathCodeARMVIXL(instruction) {
125 DCHECK(kEmitCompilerReadBarrier);
126 DCHECK(kUseBakerReadBarrier);
127 }
128
129 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
130 CodeGeneratorARMVIXL* arm_codegen = down_cast<CodeGeneratorARMVIXL*>(codegen);
131 ArmVIXLAssembler* assembler = arm_codegen->GetAssembler();
132 LocationSummary* locations = instruction_->GetLocations();
133 DCHECK(locations->CanCall());
134 DCHECK(instruction_->IsInvokeStaticOrDirect())
135 << "Unexpected instruction in read barrier arraycopy slow path: "
136 << instruction_->DebugName();
137 DCHECK(instruction_->GetLocations()->Intrinsified());
138 DCHECK_EQ(instruction_->AsInvoke()->GetIntrinsic(), Intrinsics::kSystemArrayCopy);
139
140 int32_t element_size = Primitive::ComponentSize(Primitive::kPrimNot);
141 uint32_t element_size_shift = Primitive::ComponentSizeShift(Primitive::kPrimNot);
142 uint32_t offset = mirror::Array::DataOffset(element_size).Uint32Value();
143
144 vixl32::Register dest = InputRegisterAt(instruction_, 2);
145 Location dest_pos = locations->InAt(3);
146 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0));
147 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1));
148 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2));
149 vixl32::Register tmp = RegisterFrom(locations->GetTemp(3));
150
151 __ Bind(GetEntryLabel());
152 // Compute the base destination address in `dst_curr_addr`.
153 if (dest_pos.IsConstant()) {
154 int32_t constant = Int32ConstantFrom(dest_pos);
155 __ Add(dst_curr_addr, dest, element_size * constant + offset);
156 } else {
157 __ Add(dst_curr_addr,
158 dest,
159 Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
160 __ Add(dst_curr_addr, dst_curr_addr, offset);
161 }
162
163 vixl32::Label loop;
164 __ Bind(&loop);
165 __ Ldr(tmp, MemOperand(src_curr_addr, element_size, PostIndex));
166 assembler->MaybeUnpoisonHeapReference(tmp);
167 // TODO: Inline the mark bit check before calling the runtime?
168 // tmp = ReadBarrier::Mark(tmp);
169 // No need to save live registers; it's taken care of by the
170 // entrypoint. Also, there is no need to update the stack mask,
171 // as this runtime call will not trigger a garbage collection.
172 // (See ReadBarrierMarkSlowPathARM::EmitNativeCode for more
173 // explanations.)
174 DCHECK(!tmp.IsSP());
175 DCHECK(!tmp.IsLR());
176 DCHECK(!tmp.IsPC());
177 // IP is used internally by the ReadBarrierMarkRegX entry point
178 // as a temporary (and not preserved). It thus cannot be used by
179 // any live register in this slow path.
180 DCHECK(!src_curr_addr.Is(ip));
181 DCHECK(!dst_curr_addr.Is(ip));
182 DCHECK(!src_stop_addr.Is(ip));
183 DCHECK(!tmp.Is(ip));
184 DCHECK(tmp.IsRegister()) << tmp;
185 int32_t entry_point_offset =
186 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode());
187 // This runtime call does not require a stack map.
188 arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
189 assembler->MaybePoisonHeapReference(tmp);
190 __ Str(tmp, MemOperand(dst_curr_addr, element_size, PostIndex));
191 __ Cmp(src_curr_addr, src_stop_addr);
Artem Serov517d9f62016-12-12 15:51:15 +0000192 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100193 __ B(GetExitLabel());
194 }
195
196 const char* GetDescription() const OVERRIDE {
197 return "ReadBarrierSystemArrayCopySlowPathARMVIXL";
198 }
199
200 private:
201 DISALLOW_COPY_AND_ASSIGN(ReadBarrierSystemArrayCopySlowPathARMVIXL);
202};
203
204IntrinsicLocationsBuilderARMVIXL::IntrinsicLocationsBuilderARMVIXL(CodeGeneratorARMVIXL* codegen)
205 : arena_(codegen->GetGraph()->GetArena()),
Nicolas Geoffray331605a2017-03-01 11:01:41 +0000206 codegen_(codegen),
Anton Kirilov5ec62182016-10-13 20:16:02 +0100207 assembler_(codegen->GetAssembler()),
208 features_(codegen->GetInstructionSetFeatures()) {}
209
210bool IntrinsicLocationsBuilderARMVIXL::TryDispatch(HInvoke* invoke) {
211 Dispatch(invoke);
212 LocationSummary* res = invoke->GetLocations();
213 if (res == nullptr) {
214 return false;
215 }
216 return res->Intrinsified();
217}
218
219static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
220 LocationSummary* locations = new (arena) LocationSummary(invoke,
221 LocationSummary::kNoCall,
222 kIntrinsified);
223 locations->SetInAt(0, Location::RequiresFpuRegister());
224 locations->SetOut(Location::RequiresRegister());
225}
226
227static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
228 LocationSummary* locations = new (arena) LocationSummary(invoke,
229 LocationSummary::kNoCall,
230 kIntrinsified);
231 locations->SetInAt(0, Location::RequiresRegister());
232 locations->SetOut(Location::RequiresFpuRegister());
233}
234
235static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
236 Location input = locations->InAt(0);
237 Location output = locations->Out();
238 if (is64bit) {
239 __ Vmov(LowRegisterFrom(output), HighRegisterFrom(output), DRegisterFrom(input));
240 } else {
241 __ Vmov(RegisterFrom(output), SRegisterFrom(input));
242 }
243}
244
245static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
246 Location input = locations->InAt(0);
247 Location output = locations->Out();
248 if (is64bit) {
249 __ Vmov(DRegisterFrom(output), LowRegisterFrom(input), HighRegisterFrom(input));
250 } else {
251 __ Vmov(SRegisterFrom(output), RegisterFrom(input));
252 }
253}
254
255void IntrinsicLocationsBuilderARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
256 CreateFPToIntLocations(arena_, invoke);
257}
258void IntrinsicLocationsBuilderARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
259 CreateIntToFPLocations(arena_, invoke);
260}
261
262void IntrinsicCodeGeneratorARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
263 MoveFPToInt(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
264}
265void IntrinsicCodeGeneratorARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
266 MoveIntToFP(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
267}
268
269void IntrinsicLocationsBuilderARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
270 CreateFPToIntLocations(arena_, invoke);
271}
272void IntrinsicLocationsBuilderARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
273 CreateIntToFPLocations(arena_, invoke);
274}
275
276void IntrinsicCodeGeneratorARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
277 MoveFPToInt(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
278}
279void IntrinsicCodeGeneratorARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
280 MoveIntToFP(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
281}
282
283static void CreateIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
284 LocationSummary* locations = new (arena) LocationSummary(invoke,
285 LocationSummary::kNoCall,
286 kIntrinsified);
287 locations->SetInAt(0, Location::RequiresRegister());
288 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
289}
290
291static void CreateFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
292 LocationSummary* locations = new (arena) LocationSummary(invoke,
293 LocationSummary::kNoCall,
294 kIntrinsified);
295 locations->SetInAt(0, Location::RequiresFpuRegister());
296 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
297}
298
Anton Kirilov6f644202017-02-27 18:29:45 +0000299static void GenNumberOfLeadingZeros(HInvoke* invoke,
Anton Kirilov5ec62182016-10-13 20:16:02 +0100300 Primitive::Type type,
Anton Kirilov6f644202017-02-27 18:29:45 +0000301 CodeGeneratorARMVIXL* codegen) {
302 ArmVIXLAssembler* assembler = codegen->GetAssembler();
303 LocationSummary* locations = invoke->GetLocations();
Anton Kirilov5ec62182016-10-13 20:16:02 +0100304 Location in = locations->InAt(0);
305 vixl32::Register out = RegisterFrom(locations->Out());
306
307 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
308
309 if (type == Primitive::kPrimLong) {
310 vixl32::Register in_reg_lo = LowRegisterFrom(in);
311 vixl32::Register in_reg_hi = HighRegisterFrom(in);
312 vixl32::Label end;
Anton Kirilov6f644202017-02-27 18:29:45 +0000313 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100314 __ Clz(out, in_reg_hi);
Anton Kirilov6f644202017-02-27 18:29:45 +0000315 __ CompareAndBranchIfNonZero(in_reg_hi, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100316 __ Clz(out, in_reg_lo);
317 __ Add(out, out, 32);
Anton Kirilov6f644202017-02-27 18:29:45 +0000318 if (end.IsReferenced()) {
319 __ Bind(&end);
320 }
Anton Kirilov5ec62182016-10-13 20:16:02 +0100321 } else {
322 __ Clz(out, RegisterFrom(in));
323 }
324}
325
326void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
327 CreateIntToIntLocations(arena_, invoke);
328}
329
330void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000331 GenNumberOfLeadingZeros(invoke, Primitive::kPrimInt, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100332}
333
334void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
335 LocationSummary* locations = new (arena_) LocationSummary(invoke,
336 LocationSummary::kNoCall,
337 kIntrinsified);
338 locations->SetInAt(0, Location::RequiresRegister());
339 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
340}
341
342void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000343 GenNumberOfLeadingZeros(invoke, Primitive::kPrimLong, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100344}
345
Anton Kirilov6f644202017-02-27 18:29:45 +0000346static void GenNumberOfTrailingZeros(HInvoke* invoke,
Anton Kirilov5ec62182016-10-13 20:16:02 +0100347 Primitive::Type type,
Anton Kirilov6f644202017-02-27 18:29:45 +0000348 CodeGeneratorARMVIXL* codegen) {
Anton Kirilov5ec62182016-10-13 20:16:02 +0100349 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
350
Anton Kirilov6f644202017-02-27 18:29:45 +0000351 ArmVIXLAssembler* assembler = codegen->GetAssembler();
352 LocationSummary* locations = invoke->GetLocations();
Anton Kirilov5ec62182016-10-13 20:16:02 +0100353 vixl32::Register out = RegisterFrom(locations->Out());
354
355 if (type == Primitive::kPrimLong) {
356 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
357 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
358 vixl32::Label end;
Anton Kirilov6f644202017-02-27 18:29:45 +0000359 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100360 __ Rbit(out, in_reg_lo);
361 __ Clz(out, out);
Anton Kirilov6f644202017-02-27 18:29:45 +0000362 __ CompareAndBranchIfNonZero(in_reg_lo, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100363 __ Rbit(out, in_reg_hi);
364 __ Clz(out, out);
365 __ Add(out, out, 32);
Anton Kirilov6f644202017-02-27 18:29:45 +0000366 if (end.IsReferenced()) {
367 __ Bind(&end);
368 }
Anton Kirilov5ec62182016-10-13 20:16:02 +0100369 } else {
370 vixl32::Register in = RegisterFrom(locations->InAt(0));
371 __ Rbit(out, in);
372 __ Clz(out, out);
373 }
374}
375
376void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
377 LocationSummary* locations = new (arena_) LocationSummary(invoke,
378 LocationSummary::kNoCall,
379 kIntrinsified);
380 locations->SetInAt(0, Location::RequiresRegister());
381 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
382}
383
384void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000385 GenNumberOfTrailingZeros(invoke, Primitive::kPrimInt, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100386}
387
388void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
389 LocationSummary* locations = new (arena_) LocationSummary(invoke,
390 LocationSummary::kNoCall,
391 kIntrinsified);
392 locations->SetInAt(0, Location::RequiresRegister());
393 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
394}
395
396void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000397 GenNumberOfTrailingZeros(invoke, Primitive::kPrimLong, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100398}
399
400static void MathAbsFP(HInvoke* invoke, ArmVIXLAssembler* assembler) {
401 __ Vabs(OutputVRegister(invoke), InputVRegisterAt(invoke, 0));
402}
403
404void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
405 CreateFPToFPLocations(arena_, invoke);
406}
407
408void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
409 MathAbsFP(invoke, GetAssembler());
410}
411
412void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
413 CreateFPToFPLocations(arena_, invoke);
414}
415
416void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
417 MathAbsFP(invoke, GetAssembler());
418}
419
420static void CreateIntToIntPlusTemp(ArenaAllocator* arena, HInvoke* invoke) {
421 LocationSummary* locations = new (arena) LocationSummary(invoke,
422 LocationSummary::kNoCall,
423 kIntrinsified);
424 locations->SetInAt(0, Location::RequiresRegister());
425 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
426
427 locations->AddTemp(Location::RequiresRegister());
428}
429
430static void GenAbsInteger(LocationSummary* locations,
431 bool is64bit,
432 ArmVIXLAssembler* assembler) {
433 Location in = locations->InAt(0);
434 Location output = locations->Out();
435
436 vixl32::Register mask = RegisterFrom(locations->GetTemp(0));
437
438 if (is64bit) {
439 vixl32::Register in_reg_lo = LowRegisterFrom(in);
440 vixl32::Register in_reg_hi = HighRegisterFrom(in);
441 vixl32::Register out_reg_lo = LowRegisterFrom(output);
442 vixl32::Register out_reg_hi = HighRegisterFrom(output);
443
444 DCHECK(!out_reg_lo.Is(in_reg_hi)) << "Diagonal overlap unexpected.";
445
446 __ Asr(mask, in_reg_hi, 31);
447 __ Adds(out_reg_lo, in_reg_lo, mask);
448 __ Adc(out_reg_hi, in_reg_hi, mask);
449 __ Eor(out_reg_lo, mask, out_reg_lo);
450 __ Eor(out_reg_hi, mask, out_reg_hi);
451 } else {
452 vixl32::Register in_reg = RegisterFrom(in);
453 vixl32::Register out_reg = RegisterFrom(output);
454
455 __ Asr(mask, in_reg, 31);
456 __ Add(out_reg, in_reg, mask);
457 __ Eor(out_reg, mask, out_reg);
458 }
459}
460
461void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
462 CreateIntToIntPlusTemp(arena_, invoke);
463}
464
465void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
466 GenAbsInteger(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
467}
468
469
470void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
471 CreateIntToIntPlusTemp(arena_, invoke);
472}
473
474void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
475 GenAbsInteger(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
476}
477
Anton Kirilov6f644202017-02-27 18:29:45 +0000478static void GenMinMaxFloat(HInvoke* invoke, bool is_min, CodeGeneratorARMVIXL* codegen) {
479 ArmVIXLAssembler* assembler = codegen->GetAssembler();
xueliang.zhongc032e742016-03-28 16:44:32 +0100480 Location op1_loc = invoke->GetLocations()->InAt(0);
481 Location op2_loc = invoke->GetLocations()->InAt(1);
482 Location out_loc = invoke->GetLocations()->Out();
483
484 // Optimization: don't generate any code if inputs are the same.
485 if (op1_loc.Equals(op2_loc)) {
486 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
487 return;
488 }
489
490 vixl32::SRegister op1 = SRegisterFrom(op1_loc);
491 vixl32::SRegister op2 = SRegisterFrom(op2_loc);
492 vixl32::SRegister out = OutputSRegister(invoke);
493 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
494 const vixl32::Register temp1 = temps.Acquire();
495 vixl32::Register temp2 = RegisterFrom(invoke->GetLocations()->GetTemp(0));
496 vixl32::Label nan, done;
Anton Kirilov6f644202017-02-27 18:29:45 +0000497 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &done);
xueliang.zhongc032e742016-03-28 16:44:32 +0100498
499 DCHECK(op1.Is(out));
500
501 __ Vcmp(op1, op2);
502 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
503 __ B(vs, &nan, /* far_target */ false); // if un-ordered, go to NaN handling.
504
505 // op1 <> op2
506 vixl32::ConditionType cond = is_min ? gt : lt;
507 {
508 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
509 2 * kMaxInstructionSizeInBytes,
510 CodeBufferCheckScope::kMaximumSize);
511 __ it(cond);
512 __ vmov(cond, F32, out, op2);
513 }
Anton Kirilov6f644202017-02-27 18:29:45 +0000514 // for <>(not equal), we've done min/max calculation.
515 __ B(ne, final_label, /* far_target */ false);
xueliang.zhongc032e742016-03-28 16:44:32 +0100516
517 // handle op1 == op2, max(+0.0,-0.0), min(+0.0,-0.0).
518 __ Vmov(temp1, op1);
519 __ Vmov(temp2, op2);
520 if (is_min) {
521 __ Orr(temp1, temp1, temp2);
522 } else {
523 __ And(temp1, temp1, temp2);
524 }
525 __ Vmov(out, temp1);
Anton Kirilov6f644202017-02-27 18:29:45 +0000526 __ B(final_label);
xueliang.zhongc032e742016-03-28 16:44:32 +0100527
528 // handle NaN input.
529 __ Bind(&nan);
530 __ Movt(temp1, High16Bits(kNanFloat)); // 0x7FC0xxxx is a NaN.
531 __ Vmov(out, temp1);
532
Anton Kirilov6f644202017-02-27 18:29:45 +0000533 if (done.IsReferenced()) {
534 __ Bind(&done);
535 }
xueliang.zhongc032e742016-03-28 16:44:32 +0100536}
537
538static void CreateFPFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
539 LocationSummary* locations = new (arena) LocationSummary(invoke,
540 LocationSummary::kNoCall,
541 kIntrinsified);
542 locations->SetInAt(0, Location::RequiresFpuRegister());
543 locations->SetInAt(1, Location::RequiresFpuRegister());
544 locations->SetOut(Location::SameAsFirstInput());
545}
546
547void IntrinsicLocationsBuilderARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
548 CreateFPFPToFPLocations(arena_, invoke);
549 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
550}
551
552void IntrinsicCodeGeneratorARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000553 GenMinMaxFloat(invoke, /* is_min */ true, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100554}
555
556void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
557 CreateFPFPToFPLocations(arena_, invoke);
558 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
559}
560
561void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000562 GenMinMaxFloat(invoke, /* is_min */ false, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100563}
564
Anton Kirilov6f644202017-02-27 18:29:45 +0000565static void GenMinMaxDouble(HInvoke* invoke, bool is_min, CodeGeneratorARMVIXL* codegen) {
566 ArmVIXLAssembler* assembler = codegen->GetAssembler();
xueliang.zhongc032e742016-03-28 16:44:32 +0100567 Location op1_loc = invoke->GetLocations()->InAt(0);
568 Location op2_loc = invoke->GetLocations()->InAt(1);
569 Location out_loc = invoke->GetLocations()->Out();
570
571 // Optimization: don't generate any code if inputs are the same.
572 if (op1_loc.Equals(op2_loc)) {
573 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in.
574 return;
575 }
576
577 vixl32::DRegister op1 = DRegisterFrom(op1_loc);
578 vixl32::DRegister op2 = DRegisterFrom(op2_loc);
579 vixl32::DRegister out = OutputDRegister(invoke);
580 vixl32::Label handle_nan_eq, done;
Anton Kirilov6f644202017-02-27 18:29:45 +0000581 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &done);
xueliang.zhongc032e742016-03-28 16:44:32 +0100582
583 DCHECK(op1.Is(out));
584
585 __ Vcmp(op1, op2);
586 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
587 __ B(vs, &handle_nan_eq, /* far_target */ false); // if un-ordered, go to NaN handling.
588
589 // op1 <> op2
590 vixl32::ConditionType cond = is_min ? gt : lt;
591 {
592 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
593 2 * kMaxInstructionSizeInBytes,
594 CodeBufferCheckScope::kMaximumSize);
595 __ it(cond);
596 __ vmov(cond, F64, out, op2);
597 }
Anton Kirilov6f644202017-02-27 18:29:45 +0000598 // for <>(not equal), we've done min/max calculation.
599 __ B(ne, final_label, /* far_target */ false);
xueliang.zhongc032e742016-03-28 16:44:32 +0100600
601 // handle op1 == op2, max(+0.0,-0.0).
602 if (!is_min) {
603 __ Vand(F64, out, op1, op2);
Anton Kirilov6f644202017-02-27 18:29:45 +0000604 __ B(final_label);
xueliang.zhongc032e742016-03-28 16:44:32 +0100605 }
606
607 // handle op1 == op2, min(+0.0,-0.0), NaN input.
608 __ Bind(&handle_nan_eq);
609 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN.
610
Anton Kirilov6f644202017-02-27 18:29:45 +0000611 if (done.IsReferenced()) {
612 __ Bind(&done);
613 }
xueliang.zhongc032e742016-03-28 16:44:32 +0100614}
615
616void IntrinsicLocationsBuilderARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
617 CreateFPFPToFPLocations(arena_, invoke);
618}
619
620void IntrinsicCodeGeneratorARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000621 GenMinMaxDouble(invoke, /* is_min */ true , codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100622}
623
624void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
625 CreateFPFPToFPLocations(arena_, invoke);
626}
627
628void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000629 GenMinMaxDouble(invoke, /* is_min */ false, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100630}
631
632static void GenMinMaxLong(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
633 Location op1_loc = invoke->GetLocations()->InAt(0);
634 Location op2_loc = invoke->GetLocations()->InAt(1);
635 Location out_loc = invoke->GetLocations()->Out();
636
637 // Optimization: don't generate any code if inputs are the same.
638 if (op1_loc.Equals(op2_loc)) {
639 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
640 return;
641 }
642
643 vixl32::Register op1_lo = LowRegisterFrom(op1_loc);
644 vixl32::Register op1_hi = HighRegisterFrom(op1_loc);
645 vixl32::Register op2_lo = LowRegisterFrom(op2_loc);
646 vixl32::Register op2_hi = HighRegisterFrom(op2_loc);
647 vixl32::Register out_lo = LowRegisterFrom(out_loc);
648 vixl32::Register out_hi = HighRegisterFrom(out_loc);
649 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
650 const vixl32::Register temp = temps.Acquire();
651
652 DCHECK(op1_lo.Is(out_lo));
653 DCHECK(op1_hi.Is(out_hi));
654
655 // Compare op1 >= op2, or op1 < op2.
656 __ Cmp(out_lo, op2_lo);
657 __ Sbcs(temp, out_hi, op2_hi);
658
659 // Now GE/LT condition code is correct for the long comparison.
660 {
661 vixl32::ConditionType cond = is_min ? ge : lt;
662 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
663 3 * kMaxInstructionSizeInBytes,
664 CodeBufferCheckScope::kMaximumSize);
665 __ itt(cond);
666 __ mov(cond, out_lo, op2_lo);
667 __ mov(cond, out_hi, op2_hi);
668 }
669}
670
671static void CreateLongLongToLongLocations(ArenaAllocator* arena, HInvoke* invoke) {
672 LocationSummary* locations = new (arena) LocationSummary(invoke,
673 LocationSummary::kNoCall,
674 kIntrinsified);
675 locations->SetInAt(0, Location::RequiresRegister());
676 locations->SetInAt(1, Location::RequiresRegister());
677 locations->SetOut(Location::SameAsFirstInput());
678}
679
680void IntrinsicLocationsBuilderARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
681 CreateLongLongToLongLocations(arena_, invoke);
682}
683
684void IntrinsicCodeGeneratorARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
685 GenMinMaxLong(invoke, /* is_min */ true, GetAssembler());
686}
687
688void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
689 CreateLongLongToLongLocations(arena_, invoke);
690}
691
692void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
693 GenMinMaxLong(invoke, /* is_min */ false, GetAssembler());
694}
695
Anton Kirilov5ec62182016-10-13 20:16:02 +0100696static void GenMinMax(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
697 vixl32::Register op1 = InputRegisterAt(invoke, 0);
698 vixl32::Register op2 = InputRegisterAt(invoke, 1);
699 vixl32::Register out = OutputRegister(invoke);
700
701 __ Cmp(op1, op2);
702
703 {
Artem Serov0fb37192016-12-06 18:13:40 +0000704 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
705 3 * kMaxInstructionSizeInBytes,
706 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100707
708 __ ite(is_min ? lt : gt);
709 __ mov(is_min ? lt : gt, out, op1);
710 __ mov(is_min ? ge : le, out, op2);
711 }
712}
713
714static void CreateIntIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
715 LocationSummary* locations = new (arena) LocationSummary(invoke,
716 LocationSummary::kNoCall,
717 kIntrinsified);
718 locations->SetInAt(0, Location::RequiresRegister());
719 locations->SetInAt(1, Location::RequiresRegister());
720 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
721}
722
723void IntrinsicLocationsBuilderARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
724 CreateIntIntToIntLocations(arena_, invoke);
725}
726
727void IntrinsicCodeGeneratorARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
728 GenMinMax(invoke, /* is_min */ true, GetAssembler());
729}
730
731void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
732 CreateIntIntToIntLocations(arena_, invoke);
733}
734
735void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
736 GenMinMax(invoke, /* is_min */ false, GetAssembler());
737}
738
739void IntrinsicLocationsBuilderARMVIXL::VisitMathSqrt(HInvoke* invoke) {
740 CreateFPToFPLocations(arena_, invoke);
741}
742
743void IntrinsicCodeGeneratorARMVIXL::VisitMathSqrt(HInvoke* invoke) {
744 ArmVIXLAssembler* assembler = GetAssembler();
745 __ Vsqrt(OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
746}
747
xueliang.zhong6099d5e2016-04-20 18:44:56 +0100748void IntrinsicLocationsBuilderARMVIXL::VisitMathRint(HInvoke* invoke) {
749 if (features_.HasARMv8AInstructions()) {
750 CreateFPToFPLocations(arena_, invoke);
751 }
752}
753
754void IntrinsicCodeGeneratorARMVIXL::VisitMathRint(HInvoke* invoke) {
755 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
756 ArmVIXLAssembler* assembler = GetAssembler();
757 __ Vrintn(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
758}
759
Anton Kirilov5ec62182016-10-13 20:16:02 +0100760void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
761 CreateIntToIntLocations(arena_, invoke);
762}
763
764void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
765 ArmVIXLAssembler* assembler = GetAssembler();
766 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000767 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100768}
769
770void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
771 CreateIntToIntLocations(arena_, invoke);
772}
773
774void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
775 ArmVIXLAssembler* assembler = GetAssembler();
776 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000777 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100778}
779
780void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
781 CreateIntToIntLocations(arena_, invoke);
782}
783
784void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
785 ArmVIXLAssembler* assembler = GetAssembler();
786 // Ignore upper 4B of long address.
787 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
788 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
789 // exception. So we can't use ldrd as addr may be unaligned.
790 vixl32::Register lo = LowRegisterFrom(invoke->GetLocations()->Out());
791 vixl32::Register hi = HighRegisterFrom(invoke->GetLocations()->Out());
792 if (addr.Is(lo)) {
793 __ Ldr(hi, MemOperand(addr, 4));
Scott Wakelingb77051e2016-11-21 19:46:00 +0000794 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100795 } else {
Scott Wakelingb77051e2016-11-21 19:46:00 +0000796 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100797 __ Ldr(hi, MemOperand(addr, 4));
798 }
799}
800
801void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
802 CreateIntToIntLocations(arena_, invoke);
803}
804
805void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
806 ArmVIXLAssembler* assembler = GetAssembler();
807 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000808 __ Ldrsh(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100809}
810
811static void CreateIntIntToVoidLocations(ArenaAllocator* arena, HInvoke* invoke) {
812 LocationSummary* locations = new (arena) LocationSummary(invoke,
813 LocationSummary::kNoCall,
814 kIntrinsified);
815 locations->SetInAt(0, Location::RequiresRegister());
816 locations->SetInAt(1, Location::RequiresRegister());
817}
818
819void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
820 CreateIntIntToVoidLocations(arena_, invoke);
821}
822
823void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
824 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000825 __ Strb(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100826}
827
828void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
829 CreateIntIntToVoidLocations(arena_, invoke);
830}
831
832void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
833 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000834 __ Str(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100835}
836
837void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
838 CreateIntIntToVoidLocations(arena_, invoke);
839}
840
841void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
842 ArmVIXLAssembler* assembler = GetAssembler();
843 // Ignore upper 4B of long address.
844 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
845 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
846 // exception. So we can't use ldrd as addr may be unaligned.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000847 __ Str(LowRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100848 __ Str(HighRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr, 4));
849}
850
851void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
852 CreateIntIntToVoidLocations(arena_, invoke);
853}
854
855void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
856 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000857 __ Strh(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100858}
859
860void IntrinsicLocationsBuilderARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
861 LocationSummary* locations = new (arena_) LocationSummary(invoke,
862 LocationSummary::kNoCall,
863 kIntrinsified);
864 locations->SetOut(Location::RequiresRegister());
865}
866
867void IntrinsicCodeGeneratorARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
868 ArmVIXLAssembler* assembler = GetAssembler();
869 __ Ldr(OutputRegister(invoke),
870 MemOperand(tr, Thread::PeerOffset<kArmPointerSize>().Int32Value()));
871}
872
873static void GenUnsafeGet(HInvoke* invoke,
874 Primitive::Type type,
875 bool is_volatile,
876 CodeGeneratorARMVIXL* codegen) {
877 LocationSummary* locations = invoke->GetLocations();
878 ArmVIXLAssembler* assembler = codegen->GetAssembler();
879 Location base_loc = locations->InAt(1);
880 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
881 Location offset_loc = locations->InAt(2);
882 vixl32::Register offset = LowRegisterFrom(offset_loc); // Long offset, lo part only.
883 Location trg_loc = locations->Out();
884
885 switch (type) {
886 case Primitive::kPrimInt: {
887 vixl32::Register trg = RegisterFrom(trg_loc);
888 __ Ldr(trg, MemOperand(base, offset));
889 if (is_volatile) {
890 __ Dmb(vixl32::ISH);
891 }
892 break;
893 }
894
895 case Primitive::kPrimNot: {
896 vixl32::Register trg = RegisterFrom(trg_loc);
897 if (kEmitCompilerReadBarrier) {
898 if (kUseBakerReadBarrier) {
899 Location temp = locations->GetTemp(0);
900 codegen->GenerateReferenceLoadWithBakerReadBarrier(
901 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false);
902 if (is_volatile) {
903 __ Dmb(vixl32::ISH);
904 }
905 } else {
906 __ Ldr(trg, MemOperand(base, offset));
907 if (is_volatile) {
908 __ Dmb(vixl32::ISH);
909 }
910 codegen->GenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0U, offset_loc);
911 }
912 } else {
913 __ Ldr(trg, MemOperand(base, offset));
914 if (is_volatile) {
915 __ Dmb(vixl32::ISH);
916 }
917 assembler->MaybeUnpoisonHeapReference(trg);
918 }
919 break;
920 }
921
922 case Primitive::kPrimLong: {
923 vixl32::Register trg_lo = LowRegisterFrom(trg_loc);
924 vixl32::Register trg_hi = HighRegisterFrom(trg_loc);
925 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
Artem Serov657022c2016-11-23 14:19:38 +0000926 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
927 const vixl32::Register temp_reg = temps.Acquire();
928 __ Add(temp_reg, base, offset);
929 __ Ldrexd(trg_lo, trg_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100930 } else {
931 __ Ldrd(trg_lo, trg_hi, MemOperand(base, offset));
932 }
933 if (is_volatile) {
934 __ Dmb(vixl32::ISH);
935 }
936 break;
937 }
938
939 default:
940 LOG(FATAL) << "Unexpected type " << type;
941 UNREACHABLE();
942 }
943}
944
945static void CreateIntIntIntToIntLocations(ArenaAllocator* arena,
946 HInvoke* invoke,
947 Primitive::Type type) {
948 bool can_call = kEmitCompilerReadBarrier &&
949 (invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObject ||
950 invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile);
951 LocationSummary* locations = new (arena) LocationSummary(invoke,
952 (can_call
953 ? LocationSummary::kCallOnSlowPath
954 : LocationSummary::kNoCall),
955 kIntrinsified);
956 if (can_call && kUseBakerReadBarrier) {
957 locations->SetCustomSlowPathCallerSaves(RegisterSet::Empty()); // No caller-save registers.
958 }
959 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
960 locations->SetInAt(1, Location::RequiresRegister());
961 locations->SetInAt(2, Location::RequiresRegister());
962 locations->SetOut(Location::RequiresRegister(),
963 (can_call ? Location::kOutputOverlap : Location::kNoOutputOverlap));
964 if (type == Primitive::kPrimNot && kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
965 // We need a temporary register for the read barrier marking slow
966 // path in InstructionCodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier.
967 locations->AddTemp(Location::RequiresRegister());
968 }
969}
970
971void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
972 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
973}
974void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
975 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
976}
977void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
978 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
979}
980void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
981 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
982}
983void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
984 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
985}
986void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
987 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
988}
989
990void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
991 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ false, codegen_);
992}
993void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
994 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ true, codegen_);
995}
996void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
997 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ false, codegen_);
998}
999void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
1000 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ true, codegen_);
1001}
1002void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
1003 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ false, codegen_);
1004}
1005void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
1006 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ true, codegen_);
1007}
1008
1009static void CreateIntIntIntIntToVoid(ArenaAllocator* arena,
1010 const ArmInstructionSetFeatures& features,
1011 Primitive::Type type,
1012 bool is_volatile,
1013 HInvoke* invoke) {
1014 LocationSummary* locations = new (arena) LocationSummary(invoke,
1015 LocationSummary::kNoCall,
1016 kIntrinsified);
1017 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1018 locations->SetInAt(1, Location::RequiresRegister());
1019 locations->SetInAt(2, Location::RequiresRegister());
1020 locations->SetInAt(3, Location::RequiresRegister());
1021
1022 if (type == Primitive::kPrimLong) {
1023 // Potentially need temps for ldrexd-strexd loop.
1024 if (is_volatile && !features.HasAtomicLdrdAndStrd()) {
1025 locations->AddTemp(Location::RequiresRegister()); // Temp_lo.
1026 locations->AddTemp(Location::RequiresRegister()); // Temp_hi.
1027 }
1028 } else if (type == Primitive::kPrimNot) {
1029 // Temps for card-marking.
1030 locations->AddTemp(Location::RequiresRegister()); // Temp.
1031 locations->AddTemp(Location::RequiresRegister()); // Card.
1032 }
1033}
1034
1035void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1036 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1037}
1038void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1039 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1040}
1041void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1042 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ true, invoke);
1043}
1044void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1045 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1046}
1047void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1048 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1049}
1050void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1051 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ true, invoke);
1052}
1053void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1054 CreateIntIntIntIntToVoid(
1055 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1056}
1057void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1058 CreateIntIntIntIntToVoid(
1059 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1060}
1061void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1062 CreateIntIntIntIntToVoid(
1063 arena_, features_, Primitive::kPrimLong, /* is_volatile */ true, invoke);
1064}
1065
1066static void GenUnsafePut(LocationSummary* locations,
1067 Primitive::Type type,
1068 bool is_volatile,
1069 bool is_ordered,
1070 CodeGeneratorARMVIXL* codegen) {
1071 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1072
1073 vixl32::Register base = RegisterFrom(locations->InAt(1)); // Object pointer.
1074 vixl32::Register offset = LowRegisterFrom(locations->InAt(2)); // Long offset, lo part only.
1075 vixl32::Register value;
1076
1077 if (is_volatile || is_ordered) {
1078 __ Dmb(vixl32::ISH);
1079 }
1080
1081 if (type == Primitive::kPrimLong) {
1082 vixl32::Register value_lo = LowRegisterFrom(locations->InAt(3));
1083 vixl32::Register value_hi = HighRegisterFrom(locations->InAt(3));
1084 value = value_lo;
1085 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
1086 vixl32::Register temp_lo = RegisterFrom(locations->GetTemp(0));
1087 vixl32::Register temp_hi = RegisterFrom(locations->GetTemp(1));
1088 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1089 const vixl32::Register temp_reg = temps.Acquire();
1090
1091 __ Add(temp_reg, base, offset);
1092 vixl32::Label loop_head;
1093 __ Bind(&loop_head);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001094 __ Ldrexd(temp_lo, temp_hi, MemOperand(temp_reg));
1095 __ Strexd(temp_lo, value_lo, value_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001096 __ Cmp(temp_lo, 0);
Artem Serov517d9f62016-12-12 15:51:15 +00001097 __ B(ne, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001098 } else {
1099 __ Strd(value_lo, value_hi, MemOperand(base, offset));
1100 }
1101 } else {
1102 value = RegisterFrom(locations->InAt(3));
1103 vixl32::Register source = value;
1104 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1105 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1106 __ Mov(temp, value);
1107 assembler->PoisonHeapReference(temp);
1108 source = temp;
1109 }
1110 __ Str(source, MemOperand(base, offset));
1111 }
1112
1113 if (is_volatile) {
1114 __ Dmb(vixl32::ISH);
1115 }
1116
1117 if (type == Primitive::kPrimNot) {
1118 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1119 vixl32::Register card = RegisterFrom(locations->GetTemp(1));
1120 bool value_can_be_null = true; // TODO: Worth finding out this information?
1121 codegen->MarkGCCard(temp, card, base, value, value_can_be_null);
1122 }
1123}
1124
1125void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1126 GenUnsafePut(invoke->GetLocations(),
1127 Primitive::kPrimInt,
1128 /* is_volatile */ false,
1129 /* is_ordered */ false,
1130 codegen_);
1131}
1132void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1133 GenUnsafePut(invoke->GetLocations(),
1134 Primitive::kPrimInt,
1135 /* is_volatile */ false,
1136 /* is_ordered */ true,
1137 codegen_);
1138}
1139void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1140 GenUnsafePut(invoke->GetLocations(),
1141 Primitive::kPrimInt,
1142 /* is_volatile */ true,
1143 /* is_ordered */ false,
1144 codegen_);
1145}
1146void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1147 GenUnsafePut(invoke->GetLocations(),
1148 Primitive::kPrimNot,
1149 /* is_volatile */ false,
1150 /* is_ordered */ false,
1151 codegen_);
1152}
1153void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1154 GenUnsafePut(invoke->GetLocations(),
1155 Primitive::kPrimNot,
1156 /* is_volatile */ false,
1157 /* is_ordered */ true,
1158 codegen_);
1159}
1160void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1161 GenUnsafePut(invoke->GetLocations(),
1162 Primitive::kPrimNot,
1163 /* is_volatile */ true,
1164 /* is_ordered */ false,
1165 codegen_);
1166}
1167void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1168 GenUnsafePut(invoke->GetLocations(),
1169 Primitive::kPrimLong,
1170 /* is_volatile */ false,
1171 /* is_ordered */ false,
1172 codegen_);
1173}
1174void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1175 GenUnsafePut(invoke->GetLocations(),
1176 Primitive::kPrimLong,
1177 /* is_volatile */ false,
1178 /* is_ordered */ true,
1179 codegen_);
1180}
1181void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1182 GenUnsafePut(invoke->GetLocations(),
1183 Primitive::kPrimLong,
1184 /* is_volatile */ true,
1185 /* is_ordered */ false,
1186 codegen_);
1187}
1188
1189static void CreateIntIntIntIntIntToIntPlusTemps(ArenaAllocator* arena,
1190 HInvoke* invoke,
1191 Primitive::Type type) {
1192 bool can_call = kEmitCompilerReadBarrier &&
1193 kUseBakerReadBarrier &&
1194 (invoke->GetIntrinsic() == Intrinsics::kUnsafeCASObject);
1195 LocationSummary* locations = new (arena) LocationSummary(invoke,
1196 (can_call
1197 ? LocationSummary::kCallOnSlowPath
1198 : LocationSummary::kNoCall),
1199 kIntrinsified);
1200 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1201 locations->SetInAt(1, Location::RequiresRegister());
1202 locations->SetInAt(2, Location::RequiresRegister());
1203 locations->SetInAt(3, Location::RequiresRegister());
1204 locations->SetInAt(4, Location::RequiresRegister());
1205
1206 // If heap poisoning is enabled, we don't want the unpoisoning
1207 // operations to potentially clobber the output. Likewise when
1208 // emitting a (Baker) read barrier, which may call.
1209 Location::OutputOverlap overlaps =
1210 ((kPoisonHeapReferences && type == Primitive::kPrimNot) || can_call)
1211 ? Location::kOutputOverlap
1212 : Location::kNoOutputOverlap;
1213 locations->SetOut(Location::RequiresRegister(), overlaps);
1214
1215 // Temporary registers used in CAS. In the object case
1216 // (UnsafeCASObject intrinsic), these are also used for
1217 // card-marking, and possibly for (Baker) read barrier.
1218 locations->AddTemp(Location::RequiresRegister()); // Pointer.
1219 locations->AddTemp(Location::RequiresRegister()); // Temp 1.
1220}
1221
1222static void GenCas(HInvoke* invoke, Primitive::Type type, CodeGeneratorARMVIXL* codegen) {
1223 DCHECK_NE(type, Primitive::kPrimLong);
1224
1225 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1226 LocationSummary* locations = invoke->GetLocations();
1227
1228 Location out_loc = locations->Out();
1229 vixl32::Register out = OutputRegister(invoke); // Boolean result.
1230
1231 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
1232 Location offset_loc = locations->InAt(2);
1233 vixl32::Register offset = LowRegisterFrom(offset_loc); // Offset (discard high 4B).
1234 vixl32::Register expected = InputRegisterAt(invoke, 3); // Expected.
1235 vixl32::Register value = InputRegisterAt(invoke, 4); // Value.
1236
1237 Location tmp_ptr_loc = locations->GetTemp(0);
1238 vixl32::Register tmp_ptr = RegisterFrom(tmp_ptr_loc); // Pointer to actual memory.
1239 vixl32::Register tmp = RegisterFrom(locations->GetTemp(1)); // Value in memory.
1240
1241 if (type == Primitive::kPrimNot) {
1242 // The only read barrier implementation supporting the
1243 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1244 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1245
1246 // Mark card for object assuming new value is stored. Worst case we will mark an unchanged
1247 // object and scan the receiver at the next GC for nothing.
1248 bool value_can_be_null = true; // TODO: Worth finding out this information?
1249 codegen->MarkGCCard(tmp_ptr, tmp, base, value, value_can_be_null);
1250
1251 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1252 // Need to make sure the reference stored in the field is a to-space
1253 // one before attempting the CAS or the CAS could fail incorrectly.
1254 codegen->GenerateReferenceLoadWithBakerReadBarrier(
1255 invoke,
1256 out_loc, // Unused, used only as a "temporary" within the read barrier.
1257 base,
1258 /* offset */ 0u,
1259 /* index */ offset_loc,
1260 ScaleFactor::TIMES_1,
1261 tmp_ptr_loc,
1262 /* needs_null_check */ false,
1263 /* always_update_field */ true,
1264 &tmp);
1265 }
1266 }
1267
1268 // Prevent reordering with prior memory operations.
1269 // Emit a DMB ISH instruction instead of an DMB ISHST one, as the
1270 // latter allows a preceding load to be delayed past the STXR
1271 // instruction below.
1272 __ Dmb(vixl32::ISH);
1273
1274 __ Add(tmp_ptr, base, offset);
1275
1276 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1277 codegen->GetAssembler()->PoisonHeapReference(expected);
1278 if (value.Is(expected)) {
1279 // Do not poison `value`, as it is the same register as
1280 // `expected`, which has just been poisoned.
1281 } else {
1282 codegen->GetAssembler()->PoisonHeapReference(value);
1283 }
1284 }
1285
1286 // do {
1287 // tmp = [r_ptr] - expected;
1288 // } while (tmp == 0 && failure([r_ptr] <- r_new_value));
1289 // result = tmp != 0;
1290
1291 vixl32::Label loop_head;
1292 __ Bind(&loop_head);
1293
Scott Wakelingb77051e2016-11-21 19:46:00 +00001294 __ Ldrex(tmp, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001295
1296 __ Subs(tmp, tmp, expected);
1297
1298 {
Artem Serov0fb37192016-12-06 18:13:40 +00001299 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1300 3 * kMaxInstructionSizeInBytes,
1301 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001302
1303 __ itt(eq);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001304 __ strex(eq, tmp, value, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001305 __ cmp(eq, tmp, 1);
1306 }
1307
Artem Serov517d9f62016-12-12 15:51:15 +00001308 __ B(eq, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001309
1310 __ Dmb(vixl32::ISH);
1311
1312 __ Rsbs(out, tmp, 1);
1313
1314 {
Artem Serov0fb37192016-12-06 18:13:40 +00001315 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1316 2 * kMaxInstructionSizeInBytes,
1317 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001318
1319 __ it(cc);
1320 __ mov(cc, out, 0);
1321 }
1322
1323 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1324 codegen->GetAssembler()->UnpoisonHeapReference(expected);
1325 if (value.Is(expected)) {
1326 // Do not unpoison `value`, as it is the same register as
1327 // `expected`, which has just been unpoisoned.
1328 } else {
1329 codegen->GetAssembler()->UnpoisonHeapReference(value);
1330 }
1331 }
1332}
1333
1334void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1335 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimInt);
1336}
1337void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1338 // The only read barrier implementation supporting the
1339 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1340 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1341 return;
1342 }
1343
1344 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimNot);
1345}
1346void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1347 GenCas(invoke, Primitive::kPrimInt, codegen_);
1348}
1349void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1350 // The only read barrier implementation supporting the
1351 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1352 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1353
1354 GenCas(invoke, Primitive::kPrimNot, codegen_);
1355}
1356
1357void IntrinsicLocationsBuilderARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1358 // The inputs plus one temp.
1359 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1360 invoke->InputAt(1)->CanBeNull()
1361 ? LocationSummary::kCallOnSlowPath
1362 : LocationSummary::kNoCall,
1363 kIntrinsified);
1364 locations->SetInAt(0, Location::RequiresRegister());
1365 locations->SetInAt(1, Location::RequiresRegister());
1366 locations->AddTemp(Location::RequiresRegister());
1367 locations->AddTemp(Location::RequiresRegister());
1368 locations->AddTemp(Location::RequiresRegister());
1369 // Need temporary registers for String compression's feature.
1370 if (mirror::kUseStringCompression) {
1371 locations->AddTemp(Location::RequiresRegister());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001372 }
1373 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1374}
1375
1376void IntrinsicCodeGeneratorARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1377 ArmVIXLAssembler* assembler = GetAssembler();
1378 LocationSummary* locations = invoke->GetLocations();
1379
1380 vixl32::Register str = InputRegisterAt(invoke, 0);
1381 vixl32::Register arg = InputRegisterAt(invoke, 1);
1382 vixl32::Register out = OutputRegister(invoke);
1383
1384 vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0));
1385 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1386 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001387 vixl32::Register temp3;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001388 if (mirror::kUseStringCompression) {
1389 temp3 = RegisterFrom(locations->GetTemp(3));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001390 }
1391
1392 vixl32::Label loop;
1393 vixl32::Label find_char_diff;
1394 vixl32::Label end;
1395 vixl32::Label different_compression;
1396
1397 // Get offsets of count and value fields within a string object.
1398 const int32_t count_offset = mirror::String::CountOffset().Int32Value();
1399 const int32_t value_offset = mirror::String::ValueOffset().Int32Value();
1400
1401 // Note that the null check must have been done earlier.
1402 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1403
1404 // Take slow path and throw if input can be and is null.
1405 SlowPathCodeARMVIXL* slow_path = nullptr;
1406 const bool can_slow_path = invoke->InputAt(1)->CanBeNull();
1407 if (can_slow_path) {
1408 slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1409 codegen_->AddSlowPath(slow_path);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001410 __ CompareAndBranchIfZero(arg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001411 }
1412
1413 // Reference equality check, return 0 if same reference.
1414 __ Subs(out, str, arg);
1415 __ B(eq, &end);
1416
Anton Kirilov5ec62182016-10-13 20:16:02 +01001417 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001418 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001419 __ Ldr(temp3, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001420 __ Ldr(temp2, MemOperand(arg, count_offset));
1421 // Extract lengths from the `count` fields.
1422 __ Lsr(temp0, temp3, 1u);
1423 __ Lsr(temp1, temp2, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001424 } else {
1425 // Load lengths of this and argument strings.
1426 __ Ldr(temp0, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001427 __ Ldr(temp1, MemOperand(arg, count_offset));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001428 }
1429 // out = length diff.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001430 __ Subs(out, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001431 // temp0 = min(len(str), len(arg)).
1432
1433 {
Artem Serov0fb37192016-12-06 18:13:40 +00001434 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1435 2 * kMaxInstructionSizeInBytes,
1436 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001437
1438 __ it(gt);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001439 __ mov(gt, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001440 }
1441
Anton Kirilov5ec62182016-10-13 20:16:02 +01001442 // Shorter string is empty?
xueliang.zhongf51bc622016-11-04 09:23:32 +00001443 // Note that mirror::kUseStringCompression==true introduces lots of instructions,
1444 // which makes &end label far away from this branch and makes it not 'CBZ-encodable'.
1445 __ CompareAndBranchIfZero(temp0, &end, mirror::kUseStringCompression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001446
1447 if (mirror::kUseStringCompression) {
1448 // Check if both strings using same compression style to use this comparison loop.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001449 __ Eors(temp2, temp2, temp3);
1450 __ Lsrs(temp2, temp2, 1u);
1451 __ B(cs, &different_compression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001452 // For string compression, calculate the number of bytes to compare (not chars).
1453 // This could in theory exceed INT32_MAX, so treat temp0 as unsigned.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001454 __ Lsls(temp3, temp3, 31u); // Extract purely the compression flag.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001455
Artem Serov0fb37192016-12-06 18:13:40 +00001456 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1457 2 * kMaxInstructionSizeInBytes,
1458 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001459
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001460 __ it(ne);
1461 __ add(ne, temp0, temp0, temp0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001462 }
1463
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001464 // Store offset of string value in preparation for comparison loop.
1465 __ Mov(temp1, value_offset);
1466
Anton Kirilov5ec62182016-10-13 20:16:02 +01001467 // Assertions that must hold in order to compare multiple characters at a time.
1468 CHECK_ALIGNED(value_offset, 8);
1469 static_assert(IsAligned<8>(kObjectAlignment),
1470 "String data must be 8-byte aligned for unrolled CompareTo loop.");
1471
Scott Wakelingb77051e2016-11-21 19:46:00 +00001472 const unsigned char_size = Primitive::ComponentSize(Primitive::kPrimChar);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001473 DCHECK_EQ(char_size, 2u);
1474
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001475 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1476
Anton Kirilov5ec62182016-10-13 20:16:02 +01001477 vixl32::Label find_char_diff_2nd_cmp;
1478 // Unrolled loop comparing 4x16-bit chars per iteration (ok because of string data alignment).
1479 __ Bind(&loop);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001480 vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01001481 __ Ldr(temp_reg, MemOperand(str, temp1));
1482 __ Ldr(temp2, MemOperand(arg, temp1));
1483 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001484 __ B(ne, &find_char_diff, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001485 __ Add(temp1, temp1, char_size * 2);
1486
1487 __ Ldr(temp_reg, MemOperand(str, temp1));
1488 __ Ldr(temp2, MemOperand(arg, temp1));
1489 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001490 __ B(ne, &find_char_diff_2nd_cmp, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001491 __ Add(temp1, temp1, char_size * 2);
1492 // With string compression, we have compared 8 bytes, otherwise 4 chars.
1493 __ Subs(temp0, temp0, (mirror::kUseStringCompression ? 8 : 4));
Artem Serov517d9f62016-12-12 15:51:15 +00001494 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001495 __ B(&end);
1496
1497 __ Bind(&find_char_diff_2nd_cmp);
1498 if (mirror::kUseStringCompression) {
1499 __ Subs(temp0, temp0, 4); // 4 bytes previously compared.
Artem Serov517d9f62016-12-12 15:51:15 +00001500 __ B(ls, &end, /* far_target */ false); // Was the second comparison fully beyond the end?
Anton Kirilov5ec62182016-10-13 20:16:02 +01001501 } else {
1502 // Without string compression, we can start treating temp0 as signed
1503 // and rely on the signed comparison below.
1504 __ Sub(temp0, temp0, 2);
1505 }
1506
1507 // Find the single character difference.
1508 __ Bind(&find_char_diff);
1509 // Get the bit position of the first character that differs.
1510 __ Eor(temp1, temp2, temp_reg);
1511 __ Rbit(temp1, temp1);
1512 __ Clz(temp1, temp1);
1513
1514 // temp0 = number of characters remaining to compare.
1515 // (Without string compression, it could be < 1 if a difference is found by the second CMP
1516 // in the comparison loop, and after the end of the shorter string data).
1517
1518 // Without string compression (temp1 >> 4) = character where difference occurs between the last
1519 // two words compared, in the interval [0,1].
1520 // (0 for low half-word different, 1 for high half-word different).
1521 // With string compression, (temp1 << 3) = byte where the difference occurs,
1522 // in the interval [0,3].
1523
1524 // If temp0 <= (temp1 >> (kUseStringCompression ? 3 : 4)), the difference occurs outside
1525 // the remaining string data, so just return length diff (out).
1526 // The comparison is unsigned for string compression, otherwise signed.
1527 __ Cmp(temp0, Operand(temp1, vixl32::LSR, (mirror::kUseStringCompression ? 3 : 4)));
Artem Serov517d9f62016-12-12 15:51:15 +00001528 __ B((mirror::kUseStringCompression ? ls : le), &end, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001529
Anton Kirilov5ec62182016-10-13 20:16:02 +01001530 // Extract the characters and calculate the difference.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001531 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001532 // For compressed strings we need to clear 0x7 from temp1, for uncompressed we need to clear
1533 // 0xf. We also need to prepare the character extraction mask `uncompressed ? 0xffffu : 0xffu`.
1534 // The compression flag is now in the highest bit of temp3, so let's play some tricks.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001535 __ Orr(temp3, temp3, 0xffu << 23); // uncompressed ? 0xff800000u : 0x7ff80000u
1536 __ Bic(temp1, temp1, Operand(temp3, vixl32::LSR, 31 - 3)); // &= ~(uncompressed ? 0xfu : 0x7u)
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001537 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u.
1538 __ Lsr(temp2, temp2, temp1); // Extract second character.
1539 __ Lsr(temp3, temp3, 16u); // uncompressed ? 0xffffu : 0xffu
1540 __ Lsr(out, temp_reg, temp1); // Extract first character.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001541 __ And(temp2, temp2, temp3);
1542 __ And(out, out, temp3);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001543 } else {
Anton Kirilovb88c4842016-11-14 14:37:00 +00001544 __ Bic(temp1, temp1, 0xf);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001545 __ Lsr(temp2, temp2, temp1);
1546 __ Lsr(out, temp_reg, temp1);
Anton Kirilovb88c4842016-11-14 14:37:00 +00001547 __ Movt(temp2, 0);
1548 __ Movt(out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001549 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001550
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001551 __ Sub(out, out, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001552 temps.Release(temp_reg);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001553
1554 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001555 __ B(&end);
1556 __ Bind(&different_compression);
1557
1558 // Comparison for different compression style.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001559 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
1560 DCHECK_EQ(c_char_size, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001561
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001562 // We want to free up the temp3, currently holding `str.count`, for comparison.
1563 // So, we move it to the bottom bit of the iteration count `temp0` which we tnen
1564 // need to treat as unsigned. Start by freeing the bit with an ADD and continue
1565 // further down by a LSRS+SBC which will flip the meaning of the flag but allow
1566 // `subs temp0, #2; bhi different_compression_loop` to serve as the loop condition.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001567 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001568 // `temp1` will hold the compressed data pointer, `temp2` the uncompressed data pointer.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001569 __ Mov(temp1, str);
1570 __ Mov(temp2, arg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001571 __ Lsrs(temp3, temp3, 1u); // Continue the move of the compression flag.
1572 {
Artem Serov0fb37192016-12-06 18:13:40 +00001573 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1574 3 * kMaxInstructionSizeInBytes,
1575 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001576 __ itt(cs); // Interleave with selection of temp1 and temp2.
1577 __ mov(cs, temp1, arg); // Preserves flags.
1578 __ mov(cs, temp2, str); // Preserves flags.
1579 }
Anton Kirilovb88c4842016-11-14 14:37:00 +00001580 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001581
1582 // Adjust temp1 and temp2 from string pointers to data pointers.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001583 __ Add(temp1, temp1, value_offset);
1584 __ Add(temp2, temp2, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001585
1586 vixl32::Label different_compression_loop;
1587 vixl32::Label different_compression_diff;
1588
1589 // Main loop for different compression.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001590 temp_reg = temps.Acquire();
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001591 __ Bind(&different_compression_loop);
1592 __ Ldrb(temp_reg, MemOperand(temp1, c_char_size, PostIndex));
1593 __ Ldrh(temp3, MemOperand(temp2, char_size, PostIndex));
Anton Kirilovb88c4842016-11-14 14:37:00 +00001594 __ Cmp(temp_reg, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00001595 __ B(ne, &different_compression_diff, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001596 __ Subs(temp0, temp0, 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001597 __ B(hi, &different_compression_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001598 __ B(&end);
1599
1600 // Calculate the difference.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001601 __ Bind(&different_compression_diff);
1602 __ Sub(out, temp_reg, temp3);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001603 temps.Release(temp_reg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001604 // Flip the difference if the `arg` is compressed.
1605 // `temp0` contains inverted `str` compression flag, i.e the same as `arg` compression flag.
1606 __ Lsrs(temp0, temp0, 1u);
1607 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1608 "Expecting 0=compressed, 1=uncompressed");
1609
Artem Serov0fb37192016-12-06 18:13:40 +00001610 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1611 2 * kMaxInstructionSizeInBytes,
1612 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001613 __ it(cc);
1614 __ rsb(cc, out, out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001615 }
1616
1617 __ Bind(&end);
1618
1619 if (can_slow_path) {
1620 __ Bind(slow_path->GetExitLabel());
1621 }
1622}
1623
1624void IntrinsicLocationsBuilderARMVIXL::VisitStringEquals(HInvoke* invoke) {
1625 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1626 LocationSummary::kNoCall,
1627 kIntrinsified);
1628 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1629 locations->SetInAt(0, Location::RequiresRegister());
1630 locations->SetInAt(1, Location::RequiresRegister());
1631 // Temporary registers to store lengths of strings and for calculations.
1632 // Using instruction cbz requires a low register, so explicitly set a temp to be R0.
1633 locations->AddTemp(LocationFrom(r0));
1634 locations->AddTemp(Location::RequiresRegister());
1635 locations->AddTemp(Location::RequiresRegister());
1636
1637 locations->SetOut(Location::RequiresRegister());
1638}
1639
1640void IntrinsicCodeGeneratorARMVIXL::VisitStringEquals(HInvoke* invoke) {
1641 ArmVIXLAssembler* assembler = GetAssembler();
1642 LocationSummary* locations = invoke->GetLocations();
1643
1644 vixl32::Register str = InputRegisterAt(invoke, 0);
1645 vixl32::Register arg = InputRegisterAt(invoke, 1);
1646 vixl32::Register out = OutputRegister(invoke);
1647
1648 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1649 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1650 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
1651
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001652 vixl32::Label loop;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001653 vixl32::Label end;
1654 vixl32::Label return_true;
1655 vixl32::Label return_false;
Anton Kirilov6f644202017-02-27 18:29:45 +00001656 vixl32::Label* final_label = codegen_->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001657
1658 // Get offsets of count, value, and class fields within a string object.
1659 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
1660 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
1661 const uint32_t class_offset = mirror::Object::ClassOffset().Uint32Value();
1662
1663 // Note that the null check must have been done earlier.
1664 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1665
1666 StringEqualsOptimizations optimizations(invoke);
1667 if (!optimizations.GetArgumentNotNull()) {
1668 // Check if input is null, return false if it is.
xueliang.zhongf51bc622016-11-04 09:23:32 +00001669 __ CompareAndBranchIfZero(arg, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001670 }
1671
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001672 // Reference equality check, return true if same reference.
1673 __ Cmp(str, arg);
Artem Serov517d9f62016-12-12 15:51:15 +00001674 __ B(eq, &return_true, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001675
Anton Kirilov5ec62182016-10-13 20:16:02 +01001676 if (!optimizations.GetArgumentIsString()) {
1677 // Instanceof check for the argument by comparing class fields.
1678 // All string objects must have the same type since String cannot be subclassed.
1679 // Receiver must be a string object, so its class field is equal to all strings' class fields.
1680 // If the argument is a string object, its class field must be equal to receiver's class field.
1681 __ Ldr(temp, MemOperand(str, class_offset));
1682 __ Ldr(temp1, MemOperand(arg, class_offset));
1683 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001684 __ B(ne, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001685 }
1686
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001687 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001688 __ Ldr(temp, MemOperand(str, count_offset));
1689 __ Ldr(temp1, MemOperand(arg, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001690 // Check if `count` fields are equal, return false if they're not.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001691 // Also compares the compression style, if differs return false.
1692 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001693 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001694 // Return true if both strings are empty. Even with string compression `count == 0` means empty.
1695 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1696 "Expecting 0=compressed, 1=uncompressed");
xueliang.zhongf51bc622016-11-04 09:23:32 +00001697 __ CompareAndBranchIfZero(temp, &return_true, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001698
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001699 // Assertions that must hold in order to compare strings 4 bytes at a time.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001700 DCHECK_ALIGNED(value_offset, 4);
1701 static_assert(IsAligned<4>(kObjectAlignment), "String data must be aligned for fast compare.");
1702
1703 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001704 // For string compression, calculate the number of bytes to compare (not chars).
1705 // This could in theory exceed INT32_MAX, so treat temp as unsigned.
1706 __ Lsrs(temp, temp, 1u); // Extract length and check compression flag.
Artem Serov0fb37192016-12-06 18:13:40 +00001707 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1708 2 * kMaxInstructionSizeInBytes,
1709 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001710 __ it(cs); // If uncompressed,
1711 __ add(cs, temp, temp, temp); // double the byte count.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001712 }
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001713
1714 // Store offset of string value in preparation for comparison loop.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001715 __ Mov(temp1, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001716
1717 // Loop to compare strings 4 bytes at a time starting at the front of the string.
1718 // Ok to do this because strings are zero-padded to kObjectAlignment.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001719 __ Bind(&loop);
1720 __ Ldr(out, MemOperand(str, temp1));
1721 __ Ldr(temp2, MemOperand(arg, temp1));
Scott Wakelingb77051e2016-11-21 19:46:00 +00001722 __ Add(temp1, temp1, Operand::From(sizeof(uint32_t)));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001723 __ Cmp(out, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001724 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001725 // With string compression, we have compared 4 bytes, otherwise 2 chars.
1726 __ Subs(temp, temp, mirror::kUseStringCompression ? 4 : 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001727 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001728
1729 // Return true and exit the function.
1730 // If loop does not result in returning false, we return true.
1731 __ Bind(&return_true);
1732 __ Mov(out, 1);
Anton Kirilov6f644202017-02-27 18:29:45 +00001733 __ B(final_label);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001734
1735 // Return false and exit the function.
1736 __ Bind(&return_false);
1737 __ Mov(out, 0);
Anton Kirilov6f644202017-02-27 18:29:45 +00001738
1739 if (end.IsReferenced()) {
1740 __ Bind(&end);
1741 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001742}
1743
1744static void GenerateVisitStringIndexOf(HInvoke* invoke,
1745 ArmVIXLAssembler* assembler,
1746 CodeGeneratorARMVIXL* codegen,
1747 ArenaAllocator* allocator,
1748 bool start_at_zero) {
1749 LocationSummary* locations = invoke->GetLocations();
1750
1751 // Note that the null check must have been done earlier.
1752 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1753
1754 // Check for code points > 0xFFFF. Either a slow-path check when we don't know statically,
1755 // or directly dispatch for a large constant, or omit slow-path for a small constant or a char.
1756 SlowPathCodeARMVIXL* slow_path = nullptr;
1757 HInstruction* code_point = invoke->InputAt(1);
1758 if (code_point->IsIntConstant()) {
Anton Kirilov644032c2016-12-06 17:51:43 +00001759 if (static_cast<uint32_t>(Int32ConstantFrom(code_point)) >
Anton Kirilov5ec62182016-10-13 20:16:02 +01001760 std::numeric_limits<uint16_t>::max()) {
1761 // Always needs the slow-path. We could directly dispatch to it, but this case should be
1762 // rare, so for simplicity just put the full slow-path down and branch unconditionally.
1763 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1764 codegen->AddSlowPath(slow_path);
1765 __ B(slow_path->GetEntryLabel());
1766 __ Bind(slow_path->GetExitLabel());
1767 return;
1768 }
1769 } else if (code_point->GetType() != Primitive::kPrimChar) {
1770 vixl32::Register char_reg = InputRegisterAt(invoke, 1);
1771 // 0xffff is not modified immediate but 0x10000 is, so use `>= 0x10000` instead of `> 0xffff`.
1772 __ Cmp(char_reg, static_cast<uint32_t>(std::numeric_limits<uint16_t>::max()) + 1);
1773 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1774 codegen->AddSlowPath(slow_path);
1775 __ B(hs, slow_path->GetEntryLabel());
1776 }
1777
1778 if (start_at_zero) {
1779 vixl32::Register tmp_reg = RegisterFrom(locations->GetTemp(0));
1780 DCHECK(tmp_reg.Is(r2));
1781 // Start-index = 0.
1782 __ Mov(tmp_reg, 0);
1783 }
1784
1785 codegen->InvokeRuntime(kQuickIndexOf, invoke, invoke->GetDexPc(), slow_path);
1786 CheckEntrypointTypes<kQuickIndexOf, int32_t, void*, uint32_t, uint32_t>();
1787
1788 if (slow_path != nullptr) {
1789 __ Bind(slow_path->GetExitLabel());
1790 }
1791}
1792
1793void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1794 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1795 LocationSummary::kCallOnMainAndSlowPath,
1796 kIntrinsified);
1797 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1798 // best to align the inputs accordingly.
1799 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1800 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1801 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1802 locations->SetOut(LocationFrom(r0));
1803
1804 // Need to send start-index=0.
1805 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
1806}
1807
1808void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1809 GenerateVisitStringIndexOf(
1810 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ true);
1811}
1812
1813void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1814 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1815 LocationSummary::kCallOnMainAndSlowPath,
1816 kIntrinsified);
1817 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1818 // best to align the inputs accordingly.
1819 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1820 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1821 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1822 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1823 locations->SetOut(LocationFrom(r0));
1824}
1825
1826void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1827 GenerateVisitStringIndexOf(
1828 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ false);
1829}
1830
1831void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1832 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1833 LocationSummary::kCallOnMainAndSlowPath,
1834 kIntrinsified);
1835 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1836 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1837 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1838 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1839 locations->SetInAt(3, LocationFrom(calling_convention.GetRegisterAt(3)));
1840 locations->SetOut(LocationFrom(r0));
1841}
1842
1843void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1844 ArmVIXLAssembler* assembler = GetAssembler();
1845 vixl32::Register byte_array = InputRegisterAt(invoke, 0);
1846 __ Cmp(byte_array, 0);
1847 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1848 codegen_->AddSlowPath(slow_path);
1849 __ B(eq, slow_path->GetEntryLabel());
1850
1851 codegen_->InvokeRuntime(kQuickAllocStringFromBytes, invoke, invoke->GetDexPc(), slow_path);
1852 CheckEntrypointTypes<kQuickAllocStringFromBytes, void*, void*, int32_t, int32_t, int32_t>();
1853 __ Bind(slow_path->GetExitLabel());
1854}
1855
1856void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1857 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1858 LocationSummary::kCallOnMainOnly,
1859 kIntrinsified);
1860 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1861 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1862 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1863 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1864 locations->SetOut(LocationFrom(r0));
1865}
1866
1867void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1868 // No need to emit code checking whether `locations->InAt(2)` is a null
1869 // pointer, as callers of the native method
1870 //
1871 // java.lang.StringFactory.newStringFromChars(int offset, int charCount, char[] data)
1872 //
1873 // all include a null check on `data` before calling that method.
1874 codegen_->InvokeRuntime(kQuickAllocStringFromChars, invoke, invoke->GetDexPc());
1875 CheckEntrypointTypes<kQuickAllocStringFromChars, void*, int32_t, int32_t, void*>();
1876}
1877
1878void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1879 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1880 LocationSummary::kCallOnMainAndSlowPath,
1881 kIntrinsified);
1882 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1883 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1884 locations->SetOut(LocationFrom(r0));
1885}
1886
1887void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1888 ArmVIXLAssembler* assembler = GetAssembler();
1889 vixl32::Register string_to_copy = InputRegisterAt(invoke, 0);
1890 __ Cmp(string_to_copy, 0);
1891 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1892 codegen_->AddSlowPath(slow_path);
1893 __ B(eq, slow_path->GetEntryLabel());
1894
1895 codegen_->InvokeRuntime(kQuickAllocStringFromString, invoke, invoke->GetDexPc(), slow_path);
1896 CheckEntrypointTypes<kQuickAllocStringFromString, void*, void*>();
1897
1898 __ Bind(slow_path->GetExitLabel());
1899}
1900
1901void IntrinsicLocationsBuilderARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1902 // The only read barrier implementation supporting the
1903 // SystemArrayCopy intrinsic is the Baker-style read barriers.
1904 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1905 return;
1906 }
1907
1908 CodeGenerator::CreateSystemArrayCopyLocationSummary(invoke);
1909 LocationSummary* locations = invoke->GetLocations();
1910 if (locations == nullptr) {
1911 return;
1912 }
1913
1914 HIntConstant* src_pos = invoke->InputAt(1)->AsIntConstant();
1915 HIntConstant* dest_pos = invoke->InputAt(3)->AsIntConstant();
1916 HIntConstant* length = invoke->InputAt(4)->AsIntConstant();
1917
1918 if (src_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(src_pos->GetValue())) {
1919 locations->SetInAt(1, Location::RequiresRegister());
1920 }
1921 if (dest_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(dest_pos->GetValue())) {
1922 locations->SetInAt(3, Location::RequiresRegister());
1923 }
1924 if (length != nullptr && !assembler_->ShifterOperandCanAlwaysHold(length->GetValue())) {
1925 locations->SetInAt(4, Location::RequiresRegister());
1926 }
1927 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1928 // Temporary register IP cannot be used in
1929 // ReadBarrierSystemArrayCopySlowPathARM (because that register
1930 // is clobbered by ReadBarrierMarkRegX entry points). Get an extra
1931 // temporary register from the register allocator.
1932 locations->AddTemp(Location::RequiresRegister());
1933 }
1934}
1935
1936static void CheckPosition(ArmVIXLAssembler* assembler,
1937 Location pos,
1938 vixl32::Register input,
1939 Location length,
1940 SlowPathCodeARMVIXL* slow_path,
1941 vixl32::Register temp,
1942 bool length_is_input_length = false) {
1943 // Where is the length in the Array?
1944 const uint32_t length_offset = mirror::Array::LengthOffset().Uint32Value();
1945
1946 if (pos.IsConstant()) {
1947 int32_t pos_const = Int32ConstantFrom(pos);
1948 if (pos_const == 0) {
1949 if (!length_is_input_length) {
1950 // Check that length(input) >= length.
1951 __ Ldr(temp, MemOperand(input, length_offset));
1952 if (length.IsConstant()) {
1953 __ Cmp(temp, Int32ConstantFrom(length));
1954 } else {
1955 __ Cmp(temp, RegisterFrom(length));
1956 }
1957 __ B(lt, slow_path->GetEntryLabel());
1958 }
1959 } else {
1960 // Check that length(input) >= pos.
1961 __ Ldr(temp, MemOperand(input, length_offset));
1962 __ Subs(temp, temp, pos_const);
1963 __ B(lt, slow_path->GetEntryLabel());
1964
1965 // Check that (length(input) - pos) >= length.
1966 if (length.IsConstant()) {
1967 __ Cmp(temp, Int32ConstantFrom(length));
1968 } else {
1969 __ Cmp(temp, RegisterFrom(length));
1970 }
1971 __ B(lt, slow_path->GetEntryLabel());
1972 }
1973 } else if (length_is_input_length) {
1974 // The only way the copy can succeed is if pos is zero.
1975 vixl32::Register pos_reg = RegisterFrom(pos);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001976 __ CompareAndBranchIfNonZero(pos_reg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001977 } else {
1978 // Check that pos >= 0.
1979 vixl32::Register pos_reg = RegisterFrom(pos);
1980 __ Cmp(pos_reg, 0);
1981 __ B(lt, slow_path->GetEntryLabel());
1982
1983 // Check that pos <= length(input).
1984 __ Ldr(temp, MemOperand(input, length_offset));
1985 __ Subs(temp, temp, pos_reg);
1986 __ B(lt, slow_path->GetEntryLabel());
1987
1988 // Check that (length(input) - pos) >= length.
1989 if (length.IsConstant()) {
1990 __ Cmp(temp, Int32ConstantFrom(length));
1991 } else {
1992 __ Cmp(temp, RegisterFrom(length));
1993 }
1994 __ B(lt, slow_path->GetEntryLabel());
1995 }
1996}
1997
1998void IntrinsicCodeGeneratorARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1999 // The only read barrier implementation supporting the
2000 // SystemArrayCopy intrinsic is the Baker-style read barriers.
2001 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
2002
2003 ArmVIXLAssembler* assembler = GetAssembler();
2004 LocationSummary* locations = invoke->GetLocations();
2005
2006 uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
2007 uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
2008 uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
2009 uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
2010 uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
2011
2012 vixl32::Register src = InputRegisterAt(invoke, 0);
2013 Location src_pos = locations->InAt(1);
2014 vixl32::Register dest = InputRegisterAt(invoke, 2);
2015 Location dest_pos = locations->InAt(3);
2016 Location length = locations->InAt(4);
2017 Location temp1_loc = locations->GetTemp(0);
2018 vixl32::Register temp1 = RegisterFrom(temp1_loc);
2019 Location temp2_loc = locations->GetTemp(1);
2020 vixl32::Register temp2 = RegisterFrom(temp2_loc);
2021 Location temp3_loc = locations->GetTemp(2);
2022 vixl32::Register temp3 = RegisterFrom(temp3_loc);
2023
2024 SlowPathCodeARMVIXL* intrinsic_slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2025 codegen_->AddSlowPath(intrinsic_slow_path);
2026
2027 vixl32::Label conditions_on_positions_validated;
2028 SystemArrayCopyOptimizations optimizations(invoke);
2029
2030 // If source and destination are the same, we go to slow path if we need to do
2031 // forward copying.
2032 if (src_pos.IsConstant()) {
2033 int32_t src_pos_constant = Int32ConstantFrom(src_pos);
2034 if (dest_pos.IsConstant()) {
2035 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2036 if (optimizations.GetDestinationIsSource()) {
2037 // Checked when building locations.
2038 DCHECK_GE(src_pos_constant, dest_pos_constant);
2039 } else if (src_pos_constant < dest_pos_constant) {
2040 __ Cmp(src, dest);
2041 __ B(eq, intrinsic_slow_path->GetEntryLabel());
2042 }
2043
2044 // Checked when building locations.
2045 DCHECK(!optimizations.GetDestinationIsSource()
2046 || (src_pos_constant >= Int32ConstantFrom(dest_pos)));
2047 } else {
2048 if (!optimizations.GetDestinationIsSource()) {
2049 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002050 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002051 }
2052 __ Cmp(RegisterFrom(dest_pos), src_pos_constant);
2053 __ B(gt, intrinsic_slow_path->GetEntryLabel());
2054 }
2055 } else {
2056 if (!optimizations.GetDestinationIsSource()) {
2057 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002058 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002059 }
2060 if (dest_pos.IsConstant()) {
2061 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2062 __ Cmp(RegisterFrom(src_pos), dest_pos_constant);
2063 } else {
2064 __ Cmp(RegisterFrom(src_pos), RegisterFrom(dest_pos));
2065 }
2066 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2067 }
2068
2069 __ Bind(&conditions_on_positions_validated);
2070
2071 if (!optimizations.GetSourceIsNotNull()) {
2072 // Bail out if the source is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002073 __ CompareAndBranchIfZero(src, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002074 }
2075
2076 if (!optimizations.GetDestinationIsNotNull() && !optimizations.GetDestinationIsSource()) {
2077 // Bail out if the destination is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002078 __ CompareAndBranchIfZero(dest, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002079 }
2080
2081 // If the length is negative, bail out.
2082 // We have already checked in the LocationsBuilder for the constant case.
2083 if (!length.IsConstant() &&
2084 !optimizations.GetCountIsSourceLength() &&
2085 !optimizations.GetCountIsDestinationLength()) {
2086 __ Cmp(RegisterFrom(length), 0);
2087 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2088 }
2089
2090 // Validity checks: source.
2091 CheckPosition(assembler,
2092 src_pos,
2093 src,
2094 length,
2095 intrinsic_slow_path,
2096 temp1,
2097 optimizations.GetCountIsSourceLength());
2098
2099 // Validity checks: dest.
2100 CheckPosition(assembler,
2101 dest_pos,
2102 dest,
2103 length,
2104 intrinsic_slow_path,
2105 temp1,
2106 optimizations.GetCountIsDestinationLength());
2107
2108 if (!optimizations.GetDoesNotNeedTypeCheck()) {
2109 // Check whether all elements of the source array are assignable to the component
2110 // type of the destination array. We do two checks: the classes are the same,
2111 // or the destination is Object[]. If none of these checks succeed, we go to the
2112 // slow path.
2113
2114 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2115 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2116 // /* HeapReference<Class> */ temp1 = src->klass_
2117 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2118 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2119 // Bail out if the source is not a non primitive array.
2120 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2121 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2122 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002123 __ CompareAndBranchIfZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002124 // If heap poisoning is enabled, `temp1` has been unpoisoned
2125 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2126 // /* uint16_t */ temp1 = static_cast<uint16>(temp1->primitive_type_);
2127 __ Ldrh(temp1, MemOperand(temp1, primitive_offset));
2128 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002129 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002130 }
2131
2132 // /* HeapReference<Class> */ temp1 = dest->klass_
2133 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2134 invoke, temp1_loc, dest, class_offset, temp2_loc, /* needs_null_check */ false);
2135
2136 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2137 // Bail out if the destination is not a non primitive array.
2138 //
2139 // Register `temp1` is not trashed by the read barrier emitted
2140 // by GenerateFieldLoadWithBakerReadBarrier below, as that
2141 // method produces a call to a ReadBarrierMarkRegX entry point,
2142 // which saves all potentially live registers, including
2143 // temporaries such a `temp1`.
2144 // /* HeapReference<Class> */ temp2 = temp1->component_type_
2145 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2146 invoke, temp2_loc, temp1, component_offset, temp3_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002147 __ CompareAndBranchIfZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002148 // If heap poisoning is enabled, `temp2` has been unpoisoned
2149 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2150 // /* uint16_t */ temp2 = static_cast<uint16>(temp2->primitive_type_);
2151 __ Ldrh(temp2, MemOperand(temp2, primitive_offset));
2152 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002153 __ CompareAndBranchIfNonZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002154 }
2155
2156 // For the same reason given earlier, `temp1` is not trashed by the
2157 // read barrier emitted by GenerateFieldLoadWithBakerReadBarrier below.
2158 // /* HeapReference<Class> */ temp2 = src->klass_
2159 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2160 invoke, temp2_loc, src, class_offset, temp3_loc, /* needs_null_check */ false);
2161 // Note: if heap poisoning is on, we are comparing two unpoisoned references here.
2162 __ Cmp(temp1, temp2);
2163
2164 if (optimizations.GetDestinationIsTypedObjectArray()) {
2165 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002166 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002167 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2168 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2169 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
2170 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2171 // We do not need to emit a read barrier for the following
2172 // heap reference load, as `temp1` is only used in a
2173 // comparison with null below, and this reference is not
2174 // kept afterwards.
2175 __ Ldr(temp1, MemOperand(temp1, super_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002176 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002177 __ Bind(&do_copy);
2178 } else {
2179 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2180 }
2181 } else {
2182 // Non read barrier code.
2183
2184 // /* HeapReference<Class> */ temp1 = dest->klass_
2185 __ Ldr(temp1, MemOperand(dest, class_offset));
2186 // /* HeapReference<Class> */ temp2 = src->klass_
2187 __ Ldr(temp2, MemOperand(src, class_offset));
2188 bool did_unpoison = false;
2189 if (!optimizations.GetDestinationIsNonPrimitiveArray() ||
2190 !optimizations.GetSourceIsNonPrimitiveArray()) {
2191 // One or two of the references need to be unpoisoned. Unpoison them
2192 // both to make the identity check valid.
2193 assembler->MaybeUnpoisonHeapReference(temp1);
2194 assembler->MaybeUnpoisonHeapReference(temp2);
2195 did_unpoison = true;
2196 }
2197
2198 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2199 // Bail out if the destination is not a non primitive array.
2200 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2201 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002202 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002203 assembler->MaybeUnpoisonHeapReference(temp3);
2204 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2205 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2206 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002207 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002208 }
2209
2210 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2211 // Bail out if the source is not a non primitive array.
2212 // /* HeapReference<Class> */ temp3 = temp2->component_type_
2213 __ Ldr(temp3, MemOperand(temp2, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002214 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002215 assembler->MaybeUnpoisonHeapReference(temp3);
2216 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2217 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2218 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002219 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002220 }
2221
2222 __ Cmp(temp1, temp2);
2223
2224 if (optimizations.GetDestinationIsTypedObjectArray()) {
2225 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002226 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002227 if (!did_unpoison) {
2228 assembler->MaybeUnpoisonHeapReference(temp1);
2229 }
2230 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2231 __ Ldr(temp1, MemOperand(temp1, component_offset));
2232 assembler->MaybeUnpoisonHeapReference(temp1);
2233 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2234 __ Ldr(temp1, MemOperand(temp1, super_offset));
2235 // No need to unpoison the result, we're comparing against null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002236 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002237 __ Bind(&do_copy);
2238 } else {
2239 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2240 }
2241 }
2242 } else if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2243 DCHECK(optimizations.GetDestinationIsNonPrimitiveArray());
2244 // Bail out if the source is not a non primitive array.
2245 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2246 // /* HeapReference<Class> */ temp1 = src->klass_
2247 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2248 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2249 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2250 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2251 invoke, temp3_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002252 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002253 // If heap poisoning is enabled, `temp3` has been unpoisoned
2254 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2255 } else {
2256 // /* HeapReference<Class> */ temp1 = src->klass_
2257 __ Ldr(temp1, MemOperand(src, class_offset));
2258 assembler->MaybeUnpoisonHeapReference(temp1);
2259 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2260 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002261 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002262 assembler->MaybeUnpoisonHeapReference(temp3);
2263 }
2264 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2265 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2266 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002267 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002268 }
2269
2270 int32_t element_size = Primitive::ComponentSize(Primitive::kPrimNot);
2271 uint32_t element_size_shift = Primitive::ComponentSizeShift(Primitive::kPrimNot);
2272 uint32_t offset = mirror::Array::DataOffset(element_size).Uint32Value();
2273
2274 // Compute the base source address in `temp1`.
2275 if (src_pos.IsConstant()) {
2276 int32_t constant = Int32ConstantFrom(src_pos);
2277 __ Add(temp1, src, element_size * constant + offset);
2278 } else {
2279 __ Add(temp1, src, Operand(RegisterFrom(src_pos), vixl32::LSL, element_size_shift));
2280 __ Add(temp1, temp1, offset);
2281 }
2282
2283 // Compute the end source address in `temp3`.
2284 if (length.IsConstant()) {
2285 int32_t constant = Int32ConstantFrom(length);
2286 __ Add(temp3, temp1, element_size * constant);
2287 } else {
2288 __ Add(temp3, temp1, Operand(RegisterFrom(length), vixl32::LSL, element_size_shift));
2289 }
2290
2291 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
Roland Levillainba650a42017-03-06 13:52:32 +00002292 // TODO: Also convert this intrinsic to the IsGcMarking strategy?
2293
Anton Kirilov5ec62182016-10-13 20:16:02 +01002294 // The base destination address is computed later, as `temp2` is
2295 // used for intermediate computations.
2296
2297 // SystemArrayCopy implementation for Baker read barriers (see
2298 // also CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier):
2299 //
2300 // if (src_ptr != end_ptr) {
2301 // uint32_t rb_state = Lockword(src->monitor_).ReadBarrierState();
2302 // lfence; // Load fence or artificial data dependency to prevent load-load reordering
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002303 // bool is_gray = (rb_state == ReadBarrier::GrayState());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002304 // if (is_gray) {
2305 // // Slow-path copy.
2306 // do {
2307 // *dest_ptr++ = MaybePoison(ReadBarrier::Mark(MaybeUnpoison(*src_ptr++)));
2308 // } while (src_ptr != end_ptr)
2309 // } else {
2310 // // Fast-path copy.
2311 // do {
2312 // *dest_ptr++ = *src_ptr++;
2313 // } while (src_ptr != end_ptr)
2314 // }
2315 // }
2316
2317 vixl32::Label loop, done;
2318
2319 // Don't enter copy loop if `length == 0`.
2320 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002321 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002322
2323 // /* int32_t */ monitor = src->monitor_
2324 __ Ldr(temp2, MemOperand(src, monitor_offset));
2325 // /* LockWord */ lock_word = LockWord(monitor)
2326 static_assert(sizeof(LockWord) == sizeof(int32_t),
2327 "art::LockWord and int32_t have different sizes.");
2328
2329 // Introduce a dependency on the lock_word including the rb_state,
2330 // which shall prevent load-load reordering without using
2331 // a memory barrier (which would be more expensive).
2332 // `src` is unchanged by this operation, but its value now depends
2333 // on `temp2`.
2334 __ Add(src, src, Operand(temp2, vixl32::LSR, 32));
2335
2336 // Slow path used to copy array when `src` is gray.
2337 SlowPathCodeARMVIXL* read_barrier_slow_path =
2338 new (GetAllocator()) ReadBarrierSystemArrayCopySlowPathARMVIXL(invoke);
2339 codegen_->AddSlowPath(read_barrier_slow_path);
2340
2341 // Given the numeric representation, it's enough to check the low bit of the
2342 // rb_state. We do that by shifting the bit out of the lock word with LSRS
2343 // which can be a 16-bit instruction unlike the TST immediate.
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002344 static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
2345 static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
Anton Kirilov5ec62182016-10-13 20:16:02 +01002346 __ Lsrs(temp2, temp2, LockWord::kReadBarrierStateShift + 1);
2347 // Carry flag is the last bit shifted out by LSRS.
2348 __ B(cs, read_barrier_slow_path->GetEntryLabel());
2349
2350 // Fast-path copy.
2351
2352 // Compute the base destination address in `temp2`.
2353 if (dest_pos.IsConstant()) {
2354 int32_t constant = Int32ConstantFrom(dest_pos);
2355 __ Add(temp2, dest, element_size * constant + offset);
2356 } else {
2357 __ Add(temp2, dest, Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
2358 __ Add(temp2, temp2, offset);
2359 }
2360
2361 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2362 // poison/unpoison.
2363 __ Bind(&loop);
2364
2365 {
2366 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2367 const vixl32::Register temp_reg = temps.Acquire();
2368
2369 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2370 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2371 }
2372
2373 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002374 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002375
2376 __ Bind(read_barrier_slow_path->GetExitLabel());
2377 __ Bind(&done);
2378 } else {
2379 // Non read barrier code.
2380
2381 // Compute the base destination address in `temp2`.
2382 if (dest_pos.IsConstant()) {
2383 int32_t constant = Int32ConstantFrom(dest_pos);
2384 __ Add(temp2, dest, element_size * constant + offset);
2385 } else {
2386 __ Add(temp2, dest, Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
2387 __ Add(temp2, temp2, offset);
2388 }
2389
2390 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2391 // poison/unpoison.
2392 vixl32::Label loop, done;
2393 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002394 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002395 __ Bind(&loop);
2396
2397 {
2398 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2399 const vixl32::Register temp_reg = temps.Acquire();
2400
2401 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2402 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2403 }
2404
2405 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002406 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002407 __ Bind(&done);
2408 }
2409
2410 // We only need one card marking on the destination array.
2411 codegen_->MarkGCCard(temp1, temp2, dest, NoReg, /* value_can_be_null */ false);
2412
2413 __ Bind(intrinsic_slow_path->GetExitLabel());
2414}
2415
2416static void CreateFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2417 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2418 // the code generator. Furthermore, the register allocator creates fixed live intervals
2419 // for all caller-saved registers because we are doing a function call. As a result, if
2420 // the input and output locations are unallocated, the register allocator runs out of
2421 // registers and fails; however, a debuggable graph is not the common case.
2422 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2423 return;
2424 }
2425
2426 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2427 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2428 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2429
2430 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2431 LocationSummary::kCallOnMainOnly,
2432 kIntrinsified);
2433 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2434
2435 locations->SetInAt(0, Location::RequiresFpuRegister());
2436 locations->SetOut(Location::RequiresFpuRegister());
2437 // Native code uses the soft float ABI.
2438 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2439 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2440}
2441
2442static void CreateFPFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2443 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2444 // the code generator. Furthermore, the register allocator creates fixed live intervals
2445 // for all caller-saved registers because we are doing a function call. As a result, if
2446 // the input and output locations are unallocated, the register allocator runs out of
2447 // registers and fails; however, a debuggable graph is not the common case.
2448 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2449 return;
2450 }
2451
2452 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2453 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2454 DCHECK_EQ(invoke->InputAt(1)->GetType(), Primitive::kPrimDouble);
2455 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2456
2457 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2458 LocationSummary::kCallOnMainOnly,
2459 kIntrinsified);
2460 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2461
2462 locations->SetInAt(0, Location::RequiresFpuRegister());
2463 locations->SetInAt(1, Location::RequiresFpuRegister());
2464 locations->SetOut(Location::RequiresFpuRegister());
2465 // Native code uses the soft float ABI.
2466 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2467 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2468 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
2469 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(3)));
2470}
2471
2472static void GenFPToFPCall(HInvoke* invoke,
2473 ArmVIXLAssembler* assembler,
2474 CodeGeneratorARMVIXL* codegen,
2475 QuickEntrypointEnum entry) {
2476 LocationSummary* const locations = invoke->GetLocations();
2477
2478 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2479 DCHECK(locations->WillCall() && locations->Intrinsified());
2480
2481 // Native code uses the soft float ABI.
2482 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2483 RegisterFrom(locations->GetTemp(1)),
2484 InputDRegisterAt(invoke, 0));
2485 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2486 __ Vmov(OutputDRegister(invoke),
2487 RegisterFrom(locations->GetTemp(0)),
2488 RegisterFrom(locations->GetTemp(1)));
2489}
2490
2491static void GenFPFPToFPCall(HInvoke* invoke,
2492 ArmVIXLAssembler* assembler,
2493 CodeGeneratorARMVIXL* codegen,
2494 QuickEntrypointEnum entry) {
2495 LocationSummary* const locations = invoke->GetLocations();
2496
2497 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2498 DCHECK(locations->WillCall() && locations->Intrinsified());
2499
2500 // Native code uses the soft float ABI.
2501 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2502 RegisterFrom(locations->GetTemp(1)),
2503 InputDRegisterAt(invoke, 0));
2504 __ Vmov(RegisterFrom(locations->GetTemp(2)),
2505 RegisterFrom(locations->GetTemp(3)),
2506 InputDRegisterAt(invoke, 1));
2507 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2508 __ Vmov(OutputDRegister(invoke),
2509 RegisterFrom(locations->GetTemp(0)),
2510 RegisterFrom(locations->GetTemp(1)));
2511}
2512
2513void IntrinsicLocationsBuilderARMVIXL::VisitMathCos(HInvoke* invoke) {
2514 CreateFPToFPCallLocations(arena_, invoke);
2515}
2516
2517void IntrinsicCodeGeneratorARMVIXL::VisitMathCos(HInvoke* invoke) {
2518 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCos);
2519}
2520
2521void IntrinsicLocationsBuilderARMVIXL::VisitMathSin(HInvoke* invoke) {
2522 CreateFPToFPCallLocations(arena_, invoke);
2523}
2524
2525void IntrinsicCodeGeneratorARMVIXL::VisitMathSin(HInvoke* invoke) {
2526 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSin);
2527}
2528
2529void IntrinsicLocationsBuilderARMVIXL::VisitMathAcos(HInvoke* invoke) {
2530 CreateFPToFPCallLocations(arena_, invoke);
2531}
2532
2533void IntrinsicCodeGeneratorARMVIXL::VisitMathAcos(HInvoke* invoke) {
2534 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAcos);
2535}
2536
2537void IntrinsicLocationsBuilderARMVIXL::VisitMathAsin(HInvoke* invoke) {
2538 CreateFPToFPCallLocations(arena_, invoke);
2539}
2540
2541void IntrinsicCodeGeneratorARMVIXL::VisitMathAsin(HInvoke* invoke) {
2542 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAsin);
2543}
2544
2545void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan(HInvoke* invoke) {
2546 CreateFPToFPCallLocations(arena_, invoke);
2547}
2548
2549void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan(HInvoke* invoke) {
2550 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan);
2551}
2552
2553void IntrinsicLocationsBuilderARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2554 CreateFPToFPCallLocations(arena_, invoke);
2555}
2556
2557void IntrinsicCodeGeneratorARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2558 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCbrt);
2559}
2560
2561void IntrinsicLocationsBuilderARMVIXL::VisitMathCosh(HInvoke* invoke) {
2562 CreateFPToFPCallLocations(arena_, invoke);
2563}
2564
2565void IntrinsicCodeGeneratorARMVIXL::VisitMathCosh(HInvoke* invoke) {
2566 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCosh);
2567}
2568
2569void IntrinsicLocationsBuilderARMVIXL::VisitMathExp(HInvoke* invoke) {
2570 CreateFPToFPCallLocations(arena_, invoke);
2571}
2572
2573void IntrinsicCodeGeneratorARMVIXL::VisitMathExp(HInvoke* invoke) {
2574 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExp);
2575}
2576
2577void IntrinsicLocationsBuilderARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2578 CreateFPToFPCallLocations(arena_, invoke);
2579}
2580
2581void IntrinsicCodeGeneratorARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2582 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExpm1);
2583}
2584
2585void IntrinsicLocationsBuilderARMVIXL::VisitMathLog(HInvoke* invoke) {
2586 CreateFPToFPCallLocations(arena_, invoke);
2587}
2588
2589void IntrinsicCodeGeneratorARMVIXL::VisitMathLog(HInvoke* invoke) {
2590 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog);
2591}
2592
2593void IntrinsicLocationsBuilderARMVIXL::VisitMathLog10(HInvoke* invoke) {
2594 CreateFPToFPCallLocations(arena_, invoke);
2595}
2596
2597void IntrinsicCodeGeneratorARMVIXL::VisitMathLog10(HInvoke* invoke) {
2598 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog10);
2599}
2600
2601void IntrinsicLocationsBuilderARMVIXL::VisitMathSinh(HInvoke* invoke) {
2602 CreateFPToFPCallLocations(arena_, invoke);
2603}
2604
2605void IntrinsicCodeGeneratorARMVIXL::VisitMathSinh(HInvoke* invoke) {
2606 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSinh);
2607}
2608
2609void IntrinsicLocationsBuilderARMVIXL::VisitMathTan(HInvoke* invoke) {
2610 CreateFPToFPCallLocations(arena_, invoke);
2611}
2612
2613void IntrinsicCodeGeneratorARMVIXL::VisitMathTan(HInvoke* invoke) {
2614 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTan);
2615}
2616
2617void IntrinsicLocationsBuilderARMVIXL::VisitMathTanh(HInvoke* invoke) {
2618 CreateFPToFPCallLocations(arena_, invoke);
2619}
2620
2621void IntrinsicCodeGeneratorARMVIXL::VisitMathTanh(HInvoke* invoke) {
2622 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTanh);
2623}
2624
2625void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2626 CreateFPFPToFPCallLocations(arena_, invoke);
2627}
2628
2629void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2630 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan2);
2631}
2632
2633void IntrinsicLocationsBuilderARMVIXL::VisitMathHypot(HInvoke* invoke) {
2634 CreateFPFPToFPCallLocations(arena_, invoke);
2635}
2636
2637void IntrinsicCodeGeneratorARMVIXL::VisitMathHypot(HInvoke* invoke) {
2638 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickHypot);
2639}
2640
2641void IntrinsicLocationsBuilderARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2642 CreateFPFPToFPCallLocations(arena_, invoke);
2643}
2644
2645void IntrinsicCodeGeneratorARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2646 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickNextAfter);
2647}
2648
2649void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2650 CreateIntToIntLocations(arena_, invoke);
2651}
2652
2653void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2654 ArmVIXLAssembler* assembler = GetAssembler();
2655 __ Rbit(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2656}
2657
2658void IntrinsicLocationsBuilderARMVIXL::VisitLongReverse(HInvoke* invoke) {
2659 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2660 LocationSummary::kNoCall,
2661 kIntrinsified);
2662 locations->SetInAt(0, Location::RequiresRegister());
2663 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2664}
2665
2666void IntrinsicCodeGeneratorARMVIXL::VisitLongReverse(HInvoke* invoke) {
2667 ArmVIXLAssembler* assembler = GetAssembler();
2668 LocationSummary* locations = invoke->GetLocations();
2669
2670 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2671 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2672 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2673 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2674
2675 __ Rbit(out_reg_lo, in_reg_hi);
2676 __ Rbit(out_reg_hi, in_reg_lo);
2677}
2678
2679void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2680 CreateIntToIntLocations(arena_, invoke);
2681}
2682
2683void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2684 ArmVIXLAssembler* assembler = GetAssembler();
2685 __ Rev(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2686}
2687
2688void IntrinsicLocationsBuilderARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2689 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2690 LocationSummary::kNoCall,
2691 kIntrinsified);
2692 locations->SetInAt(0, Location::RequiresRegister());
2693 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2694}
2695
2696void IntrinsicCodeGeneratorARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2697 ArmVIXLAssembler* assembler = GetAssembler();
2698 LocationSummary* locations = invoke->GetLocations();
2699
2700 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2701 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2702 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2703 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2704
2705 __ Rev(out_reg_lo, in_reg_hi);
2706 __ Rev(out_reg_hi, in_reg_lo);
2707}
2708
2709void IntrinsicLocationsBuilderARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2710 CreateIntToIntLocations(arena_, invoke);
2711}
2712
2713void IntrinsicCodeGeneratorARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2714 ArmVIXLAssembler* assembler = GetAssembler();
2715 __ Revsh(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2716}
2717
2718static void GenBitCount(HInvoke* instr, Primitive::Type type, ArmVIXLAssembler* assembler) {
2719 DCHECK(Primitive::IsIntOrLongType(type)) << type;
2720 DCHECK_EQ(instr->GetType(), Primitive::kPrimInt);
2721 DCHECK_EQ(Primitive::PrimitiveKind(instr->InputAt(0)->GetType()), type);
2722
2723 bool is_long = type == Primitive::kPrimLong;
2724 LocationSummary* locations = instr->GetLocations();
2725 Location in = locations->InAt(0);
2726 vixl32::Register src_0 = is_long ? LowRegisterFrom(in) : RegisterFrom(in);
2727 vixl32::Register src_1 = is_long ? HighRegisterFrom(in) : src_0;
2728 vixl32::SRegister tmp_s = LowSRegisterFrom(locations->GetTemp(0));
2729 vixl32::DRegister tmp_d = DRegisterFrom(locations->GetTemp(0));
2730 vixl32::Register out_r = OutputRegister(instr);
2731
2732 // Move data from core register(s) to temp D-reg for bit count calculation, then move back.
2733 // According to Cortex A57 and A72 optimization guides, compared to transferring to full D-reg,
2734 // transferring data from core reg to upper or lower half of vfp D-reg requires extra latency,
2735 // That's why for integer bit count, we use 'vmov d0, r0, r0' instead of 'vmov d0[0], r0'.
2736 __ Vmov(tmp_d, src_1, src_0); // Temp DReg |--src_1|--src_0|
2737 __ Vcnt(Untyped8, tmp_d, tmp_d); // Temp DReg |c|c|c|c|c|c|c|c|
2738 __ Vpaddl(U8, tmp_d, tmp_d); // Temp DReg |--c|--c|--c|--c|
2739 __ Vpaddl(U16, tmp_d, tmp_d); // Temp DReg |------c|------c|
2740 if (is_long) {
2741 __ Vpaddl(U32, tmp_d, tmp_d); // Temp DReg |--------------c|
2742 }
2743 __ Vmov(out_r, tmp_s);
2744}
2745
2746void IntrinsicLocationsBuilderARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2747 CreateIntToIntLocations(arena_, invoke);
2748 invoke->GetLocations()->AddTemp(Location::RequiresFpuRegister());
2749}
2750
2751void IntrinsicCodeGeneratorARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2752 GenBitCount(invoke, Primitive::kPrimInt, GetAssembler());
2753}
2754
2755void IntrinsicLocationsBuilderARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2756 VisitIntegerBitCount(invoke);
2757}
2758
2759void IntrinsicCodeGeneratorARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2760 GenBitCount(invoke, Primitive::kPrimLong, GetAssembler());
2761}
2762
2763void IntrinsicLocationsBuilderARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2764 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2765 LocationSummary::kNoCall,
2766 kIntrinsified);
2767 locations->SetInAt(0, Location::RequiresRegister());
2768 locations->SetInAt(1, Location::RequiresRegister());
2769 locations->SetInAt(2, Location::RequiresRegister());
2770 locations->SetInAt(3, Location::RequiresRegister());
2771 locations->SetInAt(4, Location::RequiresRegister());
2772
2773 // Temporary registers to store lengths of strings and for calculations.
2774 locations->AddTemp(Location::RequiresRegister());
2775 locations->AddTemp(Location::RequiresRegister());
2776 locations->AddTemp(Location::RequiresRegister());
2777}
2778
2779void IntrinsicCodeGeneratorARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2780 ArmVIXLAssembler* assembler = GetAssembler();
2781 LocationSummary* locations = invoke->GetLocations();
2782
2783 // Check assumption that sizeof(Char) is 2 (used in scaling below).
2784 const size_t char_size = Primitive::ComponentSize(Primitive::kPrimChar);
2785 DCHECK_EQ(char_size, 2u);
2786
2787 // Location of data in char array buffer.
2788 const uint32_t data_offset = mirror::Array::DataOffset(char_size).Uint32Value();
2789
2790 // Location of char array data in string.
2791 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
2792
2793 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin);
2794 // Since getChars() calls getCharsNoCheck() - we use registers rather than constants.
2795 vixl32::Register srcObj = InputRegisterAt(invoke, 0);
2796 vixl32::Register srcBegin = InputRegisterAt(invoke, 1);
2797 vixl32::Register srcEnd = InputRegisterAt(invoke, 2);
2798 vixl32::Register dstObj = InputRegisterAt(invoke, 3);
2799 vixl32::Register dstBegin = InputRegisterAt(invoke, 4);
2800
2801 vixl32::Register num_chr = RegisterFrom(locations->GetTemp(0));
2802 vixl32::Register src_ptr = RegisterFrom(locations->GetTemp(1));
2803 vixl32::Register dst_ptr = RegisterFrom(locations->GetTemp(2));
2804
2805 vixl32::Label done, compressed_string_loop;
Anton Kirilov6f644202017-02-27 18:29:45 +00002806 vixl32::Label* final_label = codegen_->GetFinalLabel(invoke, &done);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002807 // dst to be copied.
2808 __ Add(dst_ptr, dstObj, data_offset);
2809 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, vixl32::LSL, 1));
2810
2811 __ Subs(num_chr, srcEnd, srcBegin);
2812 // Early out for valid zero-length retrievals.
Anton Kirilov6f644202017-02-27 18:29:45 +00002813 __ B(eq, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002814
2815 // src range to copy.
2816 __ Add(src_ptr, srcObj, value_offset);
2817
2818 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2819 vixl32::Register temp;
2820 vixl32::Label compressed_string_preloop;
2821 if (mirror::kUseStringCompression) {
2822 // Location of count in string.
2823 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
2824 temp = temps.Acquire();
2825 // String's length.
2826 __ Ldr(temp, MemOperand(srcObj, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002827 __ Tst(temp, 1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002828 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002829 __ B(eq, &compressed_string_preloop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002830 }
2831 __ Add(src_ptr, src_ptr, Operand(srcBegin, vixl32::LSL, 1));
2832
2833 // Do the copy.
2834 vixl32::Label loop, remainder;
2835
2836 temp = temps.Acquire();
2837 // Save repairing the value of num_chr on the < 4 character path.
2838 __ Subs(temp, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002839 __ B(lt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002840
2841 // Keep the result of the earlier subs, we are going to fetch at least 4 characters.
2842 __ Mov(num_chr, temp);
2843
2844 // Main loop used for longer fetches loads and stores 4x16-bit characters at a time.
2845 // (LDRD/STRD fault on unaligned addresses and it's not worth inlining extra code
2846 // to rectify these everywhere this intrinsic applies.)
2847 __ Bind(&loop);
2848 __ Ldr(temp, MemOperand(src_ptr, char_size * 2));
2849 __ Subs(num_chr, num_chr, 4);
2850 __ Str(temp, MemOperand(dst_ptr, char_size * 2));
2851 __ Ldr(temp, MemOperand(src_ptr, char_size * 4, PostIndex));
2852 __ Str(temp, MemOperand(dst_ptr, char_size * 4, PostIndex));
2853 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002854 __ B(ge, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002855
2856 __ Adds(num_chr, num_chr, 4);
Anton Kirilov6f644202017-02-27 18:29:45 +00002857 __ B(eq, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002858
2859 // Main loop for < 4 character case and remainder handling. Loads and stores one
2860 // 16-bit Java character at a time.
2861 __ Bind(&remainder);
2862 temp = temps.Acquire();
2863 __ Ldrh(temp, MemOperand(src_ptr, char_size, PostIndex));
2864 __ Subs(num_chr, num_chr, 1);
2865 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2866 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002867 __ B(gt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002868
2869 if (mirror::kUseStringCompression) {
Anton Kirilov6f644202017-02-27 18:29:45 +00002870 __ B(final_label);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002871
Anton Kirilov5ec62182016-10-13 20:16:02 +01002872 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
2873 DCHECK_EQ(c_char_size, 1u);
2874 // Copy loop for compressed src, copying 1 character (8-bit) to (16-bit) at a time.
2875 __ Bind(&compressed_string_preloop);
2876 __ Add(src_ptr, src_ptr, srcBegin);
2877 __ Bind(&compressed_string_loop);
2878 temp = temps.Acquire();
2879 __ Ldrb(temp, MemOperand(src_ptr, c_char_size, PostIndex));
2880 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2881 temps.Release(temp);
2882 __ Subs(num_chr, num_chr, 1);
Artem Serov517d9f62016-12-12 15:51:15 +00002883 __ B(gt, &compressed_string_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002884 }
2885
Anton Kirilov6f644202017-02-27 18:29:45 +00002886 if (done.IsReferenced()) {
2887 __ Bind(&done);
2888 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01002889}
2890
2891void IntrinsicLocationsBuilderARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2892 CreateFPToIntLocations(arena_, invoke);
2893}
2894
2895void IntrinsicCodeGeneratorARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2896 ArmVIXLAssembler* const assembler = GetAssembler();
2897 const vixl32::Register out = OutputRegister(invoke);
2898 // Shifting left by 1 bit makes the value encodable as an immediate operand;
2899 // we don't care about the sign bit anyway.
2900 constexpr uint32_t infinity = kPositiveInfinityFloat << 1U;
2901
2902 __ Vmov(out, InputSRegisterAt(invoke, 0));
2903 // We don't care about the sign bit, so shift left.
2904 __ Lsl(out, out, 1);
2905 __ Eor(out, out, infinity);
2906 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2907 __ Clz(out, out);
2908 // Any number less than 32 logically shifted right by 5 bits results in 0;
2909 // the same operation on 32 yields 1.
2910 __ Lsr(out, out, 5);
2911}
2912
2913void IntrinsicLocationsBuilderARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2914 CreateFPToIntLocations(arena_, invoke);
2915}
2916
2917void IntrinsicCodeGeneratorARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2918 ArmVIXLAssembler* const assembler = GetAssembler();
2919 const vixl32::Register out = OutputRegister(invoke);
2920 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2921 const vixl32::Register temp = temps.Acquire();
2922 // The highest 32 bits of double precision positive infinity separated into
2923 // two constants encodable as immediate operands.
2924 constexpr uint32_t infinity_high = 0x7f000000U;
2925 constexpr uint32_t infinity_high2 = 0x00f00000U;
2926
2927 static_assert((infinity_high | infinity_high2) ==
2928 static_cast<uint32_t>(kPositiveInfinityDouble >> 32U),
2929 "The constants do not add up to the high 32 bits of double "
2930 "precision positive infinity.");
2931 __ Vmov(temp, out, InputDRegisterAt(invoke, 0));
2932 __ Eor(out, out, infinity_high);
2933 __ Eor(out, out, infinity_high2);
2934 // We don't care about the sign bit, so shift left.
2935 __ Orr(out, temp, Operand(out, vixl32::LSL, 1));
2936 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2937 __ Clz(out, out);
2938 // Any number less than 32 logically shifted right by 5 bits results in 0;
2939 // the same operation on 32 yields 1.
2940 __ Lsr(out, out, 5);
2941}
2942
TatWai Chongd8c052a2016-11-02 16:12:48 +08002943void IntrinsicLocationsBuilderARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2944 if (kEmitCompilerReadBarrier) {
2945 // Do not intrinsify this call with the read barrier configuration.
2946 return;
2947 }
2948 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2949 LocationSummary::kCallOnSlowPath,
2950 kIntrinsified);
2951 locations->SetInAt(0, Location::RequiresRegister());
2952 locations->SetOut(Location::SameAsFirstInput());
2953 locations->AddTemp(Location::RequiresRegister());
2954}
2955
2956void IntrinsicCodeGeneratorARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2957 DCHECK(!kEmitCompilerReadBarrier);
2958 ArmVIXLAssembler* assembler = GetAssembler();
2959 LocationSummary* locations = invoke->GetLocations();
2960
2961 vixl32::Register obj = InputRegisterAt(invoke, 0);
2962 vixl32::Register out = OutputRegister(invoke);
2963
2964 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2965 codegen_->AddSlowPath(slow_path);
2966
2967 // Load ArtMethod first.
2968 HInvokeStaticOrDirect* invoke_direct = invoke->AsInvokeStaticOrDirect();
2969 DCHECK(invoke_direct != nullptr);
2970 vixl32::Register temp0 = RegisterFrom(codegen_->GenerateCalleeMethodStaticOrDirectCall(
2971 invoke_direct, locations->GetTemp(0)));
2972
2973 // Now get declaring class.
2974 __ Ldr(temp0, MemOperand(temp0, ArtMethod::DeclaringClassOffset().Int32Value()));
2975
2976 uint32_t slow_path_flag_offset = codegen_->GetReferenceSlowFlagOffset();
2977 uint32_t disable_flag_offset = codegen_->GetReferenceDisableFlagOffset();
2978 DCHECK_NE(slow_path_flag_offset, 0u);
2979 DCHECK_NE(disable_flag_offset, 0u);
2980 DCHECK_NE(slow_path_flag_offset, disable_flag_offset);
2981
2982 // Check static flags that prevent using intrinsic.
2983 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2984 vixl32::Register temp1 = temps.Acquire();
2985 __ Ldr(temp1, MemOperand(temp0, disable_flag_offset));
2986 __ Ldr(temp0, MemOperand(temp0, slow_path_flag_offset));
2987 __ Orr(temp0, temp1, temp0);
2988 __ CompareAndBranchIfNonZero(temp0, slow_path->GetEntryLabel());
2989
2990 // Fast path.
2991 __ Ldr(out, MemOperand(obj, mirror::Reference::ReferentOffset().Int32Value()));
2992 codegen_->MaybeRecordImplicitNullCheck(invoke);
2993 assembler->MaybeUnpoisonHeapReference(out);
2994 __ Bind(slow_path->GetExitLabel());
2995}
2996
Artem Serov9aee2d42017-01-06 15:58:31 +00002997void IntrinsicLocationsBuilderARMVIXL::VisitMathCeil(HInvoke* invoke) {
2998 if (features_.HasARMv8AInstructions()) {
2999 CreateFPToFPLocations(arena_, invoke);
3000 }
3001}
3002
3003void IntrinsicCodeGeneratorARMVIXL::VisitMathCeil(HInvoke* invoke) {
3004 ArmVIXLAssembler* assembler = GetAssembler();
3005 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
3006 __ Vrintp(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
3007}
3008
3009void IntrinsicLocationsBuilderARMVIXL::VisitMathFloor(HInvoke* invoke) {
3010 if (features_.HasARMv8AInstructions()) {
3011 CreateFPToFPLocations(arena_, invoke);
3012 }
3013}
3014
3015void IntrinsicCodeGeneratorARMVIXL::VisitMathFloor(HInvoke* invoke) {
3016 ArmVIXLAssembler* assembler = GetAssembler();
3017 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
3018 __ Vrintm(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
3019}
3020
Nicolas Geoffray331605a2017-03-01 11:01:41 +00003021void IntrinsicLocationsBuilderARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
3022 InvokeRuntimeCallingConventionARMVIXL calling_convention;
3023 IntrinsicVisitor::ComputeIntegerValueOfLocations(
3024 invoke,
3025 codegen_,
3026 LocationFrom(r0),
3027 LocationFrom(calling_convention.GetRegisterAt(0)));
3028}
3029
3030void IntrinsicCodeGeneratorARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
3031 IntrinsicVisitor::IntegerValueOfInfo info = IntrinsicVisitor::ComputeIntegerValueOfInfo();
3032 LocationSummary* locations = invoke->GetLocations();
3033 ArmVIXLAssembler* const assembler = GetAssembler();
3034
3035 vixl32::Register out = RegisterFrom(locations->Out());
3036 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
3037 vixl32::Register temp = temps.Acquire();
3038 InvokeRuntimeCallingConventionARMVIXL calling_convention;
3039 vixl32::Register argument = calling_convention.GetRegisterAt(0);
3040 if (invoke->InputAt(0)->IsConstant()) {
3041 int32_t value = invoke->InputAt(0)->AsIntConstant()->GetValue();
3042 if (value >= info.low && value <= info.high) {
3043 // Just embed the j.l.Integer in the code.
3044 ScopedObjectAccess soa(Thread::Current());
3045 mirror::Object* boxed = info.cache->Get(value + (-info.low));
3046 DCHECK(boxed != nullptr && Runtime::Current()->GetHeap()->ObjectIsInBootImageSpace(boxed));
3047 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(boxed));
3048 __ Ldr(out, codegen_->DeduplicateBootImageAddressLiteral(address));
3049 } else {
3050 // Allocate and initialize a new j.l.Integer.
3051 // TODO: If we JIT, we could allocate the j.l.Integer now, and store it in the
3052 // JIT object table.
3053 uint32_t address =
3054 dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3055 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3056 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3057 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3058 __ Mov(temp, value);
3059 assembler->StoreToOffset(kStoreWord, temp, out, info.value_offset);
3060 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3061 // one.
3062 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3063 }
3064 } else {
3065 vixl32::Register in = RegisterFrom(locations->InAt(0));
3066 // Check bounds of our cache.
3067 __ Add(out, in, -info.low);
3068 __ Cmp(out, info.high - info.low + 1);
3069 vixl32::Label allocate, done;
3070 __ B(hs, &allocate);
3071 // If the value is within the bounds, load the j.l.Integer directly from the array.
3072 uint32_t data_offset = mirror::Array::DataOffset(kHeapReferenceSize).Uint32Value();
3073 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.cache));
3074 __ Ldr(temp, codegen_->DeduplicateBootImageAddressLiteral(data_offset + address));
3075 codegen_->LoadFromShiftedRegOffset(Primitive::kPrimNot, locations->Out(), temp, out);
3076 assembler->MaybeUnpoisonHeapReference(out);
3077 __ B(&done);
3078 __ Bind(&allocate);
3079 // Otherwise allocate and initialize a new j.l.Integer.
3080 address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3081 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3082 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3083 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3084 assembler->StoreToOffset(kStoreWord, in, out, info.value_offset);
3085 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3086 // one.
3087 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3088 __ Bind(&done);
3089 }
3090}
3091
Anton Kirilov5ec62182016-10-13 20:16:02 +01003092UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundDouble) // Could be done by changing rounding mode, maybe?
3093UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundFloat) // Could be done by changing rounding mode, maybe?
3094UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeCASLong) // High register pressure.
3095UNIMPLEMENTED_INTRINSIC(ARMVIXL, SystemArrayCopyChar)
Anton Kirilov5ec62182016-10-13 20:16:02 +01003096UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerHighestOneBit)
3097UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongHighestOneBit)
3098UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerLowestOneBit)
3099UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongLowestOneBit)
3100
Aart Bikff7d89c2016-11-07 08:49:28 -08003101UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOf);
3102UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOfAfter);
Aart Bik71bf7b42016-11-16 10:17:46 -08003103UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferAppend);
3104UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferLength);
3105UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferToString);
3106UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderAppend);
3107UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderLength);
3108UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderToString);
Aart Bikff7d89c2016-11-07 08:49:28 -08003109
Anton Kirilov5ec62182016-10-13 20:16:02 +01003110// 1.8.
3111UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddInt)
3112UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddLong)
3113UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetInt)
3114UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetLong)
3115UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetObject)
3116
3117UNREACHABLE_INTRINSICS(ARMVIXL)
3118
3119#undef __
3120
3121} // namespace arm
3122} // namespace art