blob: b96bb74182ae719cca77895744684e2ec50d2317 [file] [log] [blame]
Dave Allison65fcc2c2014-04-28 13:45:27 -07001/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
18#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
19
20#include <vector>
21
22#include "base/logging.h"
23#include "constants_arm.h"
24#include "utils/arm/managed_register_arm.h"
25#include "utils/arm/assembler_arm.h"
26#include "offsets.h"
Dave Allison65fcc2c2014-04-28 13:45:27 -070027
28namespace art {
29namespace arm {
30
31class Arm32Assembler FINAL : public ArmAssembler {
32 public:
33 Arm32Assembler() {
34 }
35 virtual ~Arm32Assembler() {}
36
37 bool IsThumb() const OVERRIDE {
38 return false;
39 }
40
41 // Data-processing instructions.
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010042 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
43 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070044
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010045 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
46 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070047
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010048 virtual void sub(Register rd, Register rn, const ShifterOperand& so,
49 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070050
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010051 virtual void rsb(Register rd, Register rn, const ShifterOperand& so,
52 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070053
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010054 virtual void add(Register rd, Register rn, const ShifterOperand& so,
55 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070056
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010057 virtual void adc(Register rd, Register rn, const ShifterOperand& so,
58 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070059
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010060 virtual void sbc(Register rd, Register rn, const ShifterOperand& so,
61 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070062
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010063 virtual void rsc(Register rd, Register rn, const ShifterOperand& so,
64 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070065
66 void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
67
68 void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
69
70 void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
71
72 void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
73
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010074 virtual void orr(Register rd, Register rn, const ShifterOperand& so,
75 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070076
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010077 virtual void mov(Register rd, const ShifterOperand& so,
78 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070079
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010080 virtual void bic(Register rd, Register rn, const ShifterOperand& so,
81 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070082
Vladimir Marko73cf0fb2015-07-30 15:07:22 +010083 virtual void mvn(Register rd, const ShifterOperand& so,
84 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070085
86 // Miscellaneous data-processing instructions.
87 void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE;
88 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
89 void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
90
91 // Multiply instructions.
92 void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
93 void mla(Register rd, Register rn, Register rm, Register ra,
94 Condition cond = AL) OVERRIDE;
95 void mls(Register rd, Register rn, Register rm, Register ra,
96 Condition cond = AL) OVERRIDE;
Zheng Xuc6667102015-05-15 16:08:45 +080097 void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
98 Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -070099 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
100 Condition cond = AL) OVERRIDE;
101
102 void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
103 void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
104
Roland Levillain981e4542014-11-14 11:47:14 +0000105 // Bit field extract instructions.
Roland Levillain51d3fc42014-11-13 14:11:42 +0000106 void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
Roland Levillain981e4542014-11-14 11:47:14 +0000107 void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
Roland Levillain51d3fc42014-11-13 14:11:42 +0000108
Dave Allison65fcc2c2014-04-28 13:45:27 -0700109 // Load/store instructions.
110 void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
111 void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
112
113 void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
114 void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
115
116 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
117 void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
118
119 void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
120 void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
121
122 void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
123 void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
124
125 void ldm(BlockAddressMode am, Register base,
126 RegList regs, Condition cond = AL) OVERRIDE;
127 void stm(BlockAddressMode am, Register base,
128 RegList regs, Condition cond = AL) OVERRIDE;
129
130 void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE;
131 void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE;
Calin Juravle52c48962014-12-16 17:02:57 +0000132 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
133 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700134
135 // Miscellaneous instructions.
136 void clrex(Condition cond = AL) OVERRIDE;
137 void nop(Condition cond = AL) OVERRIDE;
138
139 // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
140 void bkpt(uint16_t imm16) OVERRIDE;
141 void svc(uint32_t imm24) OVERRIDE;
142
143 void cbz(Register rn, Label* target) OVERRIDE;
144 void cbnz(Register rn, Label* target) OVERRIDE;
145
146 // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
147 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
148 void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE;
149 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
150 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
151 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
152 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
153 void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
154 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
155
156 // Returns false if the immediate cannot be encoded.
157 bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE;
158 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
159
160 void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
161 void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
162 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
163 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
164
165 void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
166 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
167 void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
168 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
169 void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
170 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
171 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
172 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
173 void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
174 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
175 void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
176 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
177
178 void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
179 void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
180 void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
181 void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
182 void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
183 void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
184
185 void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
186 void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
187 void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
188 void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
189 void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
190 void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
191 void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
192 void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
193 void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
194 void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
195
196 void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
197 void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
198 void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE;
199 void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE;
200 void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR
201
202 void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
203 void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
204 void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
205 void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
206
207 // Branch instructions.
Nicolas Geoffrayd56376c2015-05-21 12:32:34 +0000208 void b(Label* label, Condition cond = AL) OVERRIDE;
209 void bl(Label* label, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700210 void blx(Register rm, Condition cond = AL) OVERRIDE;
211 void bx(Register rm, Condition cond = AL) OVERRIDE;
Vladimir Marko73cf0fb2015-07-30 15:07:22 +0100212 virtual void Lsl(Register rd, Register rm, uint32_t shift_imm,
213 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
214 virtual void Lsr(Register rd, Register rm, uint32_t shift_imm,
215 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
216 virtual void Asr(Register rd, Register rm, uint32_t shift_imm,
217 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
218 virtual void Ror(Register rd, Register rm, uint32_t shift_imm,
219 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
220 virtual void Rrx(Register rd, Register rm,
221 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison45fdb932014-06-25 12:37:10 -0700222
Vladimir Marko73cf0fb2015-07-30 15:07:22 +0100223 virtual void Lsl(Register rd, Register rm, Register rn,
224 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
225 virtual void Lsr(Register rd, Register rm, Register rn,
226 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
227 virtual void Asr(Register rd, Register rm, Register rn,
228 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
229 virtual void Ror(Register rd, Register rm, Register rn,
230 Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700231
232 void Push(Register rd, Condition cond = AL) OVERRIDE;
233 void Pop(Register rd, Condition cond = AL) OVERRIDE;
234
235 void PushList(RegList regs, Condition cond = AL) OVERRIDE;
236 void PopList(RegList regs, Condition cond = AL) OVERRIDE;
237
238 void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE;
239
240 void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE;
241 void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE;
242
Nicolas Geoffray19a19cf2014-10-22 16:07:05 +0100243 // Memory barriers.
244 void dmb(DmbOptions flavor) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700245
Vladimir Markocf93a5c2015-06-16 11:33:24 +0000246 // Get the final position of a label after local fixup based on the old position
247 // recorded before FinalizeCode().
248 uint32_t GetAdjustedPosition(uint32_t old_position) OVERRIDE;
249
250 Literal* NewLiteral(size_t size, const uint8_t* data) OVERRIDE;
251 void LoadLiteral(Register rt, Literal* literal) OVERRIDE;
252 void LoadLiteral(Register rt, Register rt2, Literal* literal) OVERRIDE;
253 void LoadLiteral(SRegister sd, Literal* literal) OVERRIDE;
254 void LoadLiteral(DRegister dd, Literal* literal) OVERRIDE;
255
Dave Allison65fcc2c2014-04-28 13:45:27 -0700256 // Add signed constant value to rd. May clobber IP.
257 void AddConstant(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
258 void AddConstant(Register rd, Register rn, int32_t value,
259 Condition cond = AL) OVERRIDE;
260 void AddConstantSetFlags(Register rd, Register rn, int32_t value,
261 Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700262
263 // Load and Store. May clobber IP.
264 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700265 void MarkExceptionHandler(Label* label) OVERRIDE;
266 void LoadFromOffset(LoadOperandType type,
267 Register reg,
268 Register base,
269 int32_t offset,
270 Condition cond = AL) OVERRIDE;
271 void StoreToOffset(StoreOperandType type,
272 Register reg,
273 Register base,
274 int32_t offset,
275 Condition cond = AL) OVERRIDE;
276 void LoadSFromOffset(SRegister reg,
277 Register base,
278 int32_t offset,
279 Condition cond = AL) OVERRIDE;
280 void StoreSToOffset(SRegister reg,
281 Register base,
282 int32_t offset,
283 Condition cond = AL) OVERRIDE;
284 void LoadDFromOffset(DRegister reg,
285 Register base,
286 int32_t offset,
287 Condition cond = AL) OVERRIDE;
288 void StoreDToOffset(DRegister reg,
289 Register base,
290 int32_t offset,
291 Condition cond = AL) OVERRIDE;
292
Nicolas Geoffray3bcc8ea2014-11-28 15:00:02 +0000293 bool ShifterOperandCanHold(Register rd,
294 Register rn,
295 Opcode opcode,
296 uint32_t immediate,
297 ShifterOperand* shifter_op) OVERRIDE;
298
Dave Allison65fcc2c2014-04-28 13:45:27 -0700299
Ian Rogers13735952014-10-08 12:43:28 -0700300 static bool IsInstructionForExceptionHandling(uintptr_t pc);
Dave Allison65fcc2c2014-04-28 13:45:27 -0700301
302 // Emit data (e.g. encoded instruction or immediate) to the
303 // instruction stream.
304 void Emit(int32_t value);
305 void Bind(Label* label) OVERRIDE;
306
307 void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
308
309 private:
310 void EmitType01(Condition cond,
311 int type,
312 Opcode opcode,
Vladimir Marko73cf0fb2015-07-30 15:07:22 +0100313 SetCc set_cc,
Dave Allison65fcc2c2014-04-28 13:45:27 -0700314 Register rn,
315 Register rd,
316 const ShifterOperand& so);
317
318 void EmitType5(Condition cond, int offset, bool link);
319
320 void EmitMemOp(Condition cond,
321 bool load,
322 bool byte,
323 Register rd,
324 const Address& ad);
325
326 void EmitMemOpAddressMode3(Condition cond,
327 int32_t mode,
328 Register rd,
329 const Address& ad);
330
331 void EmitMultiMemOp(Condition cond,
332 BlockAddressMode am,
333 bool load,
334 Register base,
335 RegList regs);
336
337 void EmitShiftImmediate(Condition cond,
338 Shift opcode,
339 Register rd,
340 Register rm,
341 const ShifterOperand& so);
342
343 void EmitShiftRegister(Condition cond,
344 Shift opcode,
345 Register rd,
346 Register rm,
347 const ShifterOperand& so);
348
349 void EmitMulOp(Condition cond,
350 int32_t opcode,
351 Register rd,
352 Register rn,
353 Register rm,
354 Register rs);
355
356 void EmitVFPsss(Condition cond,
357 int32_t opcode,
358 SRegister sd,
359 SRegister sn,
360 SRegister sm);
361
362 void EmitVFPddd(Condition cond,
363 int32_t opcode,
364 DRegister dd,
365 DRegister dn,
366 DRegister dm);
367
368 void EmitVFPsd(Condition cond,
369 int32_t opcode,
370 SRegister sd,
371 DRegister dm);
372
373 void EmitVFPds(Condition cond,
374 int32_t opcode,
375 DRegister dd,
376 SRegister sm);
377
378 void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
379
380 void EmitBranch(Condition cond, Label* label, bool link);
381 static int32_t EncodeBranchOffset(int offset, int32_t inst);
382 static int DecodeBranchOffset(int32_t inst);
383 int32_t EncodeTstOffset(int offset, int32_t inst);
384 int DecodeTstOffset(int32_t inst);
Nicolas Geoffray3bcc8ea2014-11-28 15:00:02 +0000385 bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op);
Dave Allison65fcc2c2014-04-28 13:45:27 -0700386};
387
388} // namespace arm
389} // namespace art
390
391#endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_