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Elliott Hughes2faa5f12012-01-30 14:42:07 -08001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070016
Ian Rogers2c8f6532011-09-02 17:16:34 -070017#include "assembler.h"
18
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070019#include <algorithm>
20#include <vector>
Ian Rogers2c8f6532011-09-02 17:16:34 -070021
Alex Light50fa9932015-08-10 15:30:07 -070022#ifdef ART_ENABLE_CODEGEN_arm
Dave Allison65fcc2c2014-04-28 13:45:27 -070023#include "arm/assembler_arm32.h"
24#include "arm/assembler_thumb2.h"
Alex Light50fa9932015-08-10 15:30:07 -070025#endif
26#ifdef ART_ENABLE_CODEGEN_arm64
Serban Constantinescued8dd492014-02-11 14:15:10 +000027#include "arm64/assembler_arm64.h"
Alex Light50fa9932015-08-10 15:30:07 -070028#endif
29#ifdef ART_ENABLE_CODEGEN_mips
jeffhao7fbee072012-08-24 17:56:54 -070030#include "mips/assembler_mips.h"
Alex Light50fa9932015-08-10 15:30:07 -070031#endif
32#ifdef ART_ENABLE_CODEGEN_mips64
Andreas Gampe57b34292015-01-14 15:45:59 -080033#include "mips64/assembler_mips64.h"
Alex Light50fa9932015-08-10 15:30:07 -070034#endif
35#ifdef ART_ENABLE_CODEGEN_x86
Ian Rogers57b86d42012-03-27 16:05:41 -070036#include "x86/assembler_x86.h"
Alex Light50fa9932015-08-10 15:30:07 -070037#endif
38#ifdef ART_ENABLE_CODEGEN_x86_64
Dmitry Petrochenkofca82202014-03-21 11:21:37 +070039#include "x86_64/assembler_x86_64.h"
Alex Light50fa9932015-08-10 15:30:07 -070040#endif
Vladimir Marko10ef6942015-10-22 15:25:54 +010041#include "base/casts.h"
Brian Carlstrom578bbdc2011-07-21 14:07:47 -070042#include "globals.h"
43#include "memory_region.h"
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070044
Carl Shapiro6b6b5f02011-06-21 15:05:09 -070045namespace art {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070046
Vladimir Marko93205e32016-04-13 11:59:46 +010047AssemblerBuffer::AssemblerBuffer(ArenaAllocator* arena)
48 : arena_(arena) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070049 static const size_t kInitialBufferCapacity = 4 * KB;
Vladimir Marko9152fed2016-04-20 14:39:47 +010050 contents_ = arena_->AllocArray<uint8_t>(kInitialBufferCapacity, kArenaAllocAssembler);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070051 cursor_ = contents_;
52 limit_ = ComputeLimit(contents_, kInitialBufferCapacity);
Mathieu Chartier2cebb242015-04-21 16:50:40 -070053 fixup_ = nullptr;
54 slow_path_ = nullptr;
Elliott Hughes31f1f4f2012-03-12 13:57:36 -070055#ifndef NDEBUG
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070056 has_ensured_capacity_ = false;
57 fixups_processed_ = false;
58#endif
59
60 // Verify internal state.
61 CHECK_EQ(Capacity(), kInitialBufferCapacity);
Elliott Hughes1f359b02011-07-17 14:27:17 -070062 CHECK_EQ(Size(), 0U);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070063}
64
65
66AssemblerBuffer::~AssemblerBuffer() {
Vladimir Marko93205e32016-04-13 11:59:46 +010067 if (arena_->IsRunningOnMemoryTool()) {
68 arena_->MakeInaccessible(contents_, Capacity());
69 }
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070070}
71
72
73void AssemblerBuffer::ProcessFixups(const MemoryRegion& region) {
74 AssemblerFixup* fixup = fixup_;
Mathieu Chartier2cebb242015-04-21 16:50:40 -070075 while (fixup != nullptr) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070076 fixup->Process(region, fixup->position());
77 fixup = fixup->previous();
78 }
79}
80
81
82void AssemblerBuffer::FinalizeInstructions(const MemoryRegion& instructions) {
83 // Copy the instructions from the buffer.
84 MemoryRegion from(reinterpret_cast<void*>(contents()), Size());
85 instructions.CopyFrom(0, from);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070086 // Process fixups in the instructions.
87 ProcessFixups(instructions);
Elliott Hughes31f1f4f2012-03-12 13:57:36 -070088#ifndef NDEBUG
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070089 fixups_processed_ = true;
90#endif
91}
92
93
Vladimir Markocf93a5c2015-06-16 11:33:24 +000094void AssemblerBuffer::ExtendCapacity(size_t min_capacity) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070095 size_t old_size = Size();
96 size_t old_capacity = Capacity();
Vladimir Marko9152fed2016-04-20 14:39:47 +010097 DCHECK_GT(min_capacity, old_capacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070098 size_t new_capacity = std::min(old_capacity * 2, old_capacity + 1 * MB);
Vladimir Markocf93a5c2015-06-16 11:33:24 +000099 new_capacity = std::max(new_capacity, min_capacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -0700100
101 // Allocate the new data area and copy contents of the old one to it.
Vladimir Marko93205e32016-04-13 11:59:46 +0100102 contents_ = reinterpret_cast<uint8_t*>(
103 arena_->Realloc(contents_, old_capacity, new_capacity, kArenaAllocAssembler));
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -0700104
105 // Update the cursor and recompute the limit.
Vladimir Marko93205e32016-04-13 11:59:46 +0100106 cursor_ = contents_ + old_size;
107 limit_ = ComputeLimit(contents_, new_capacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -0700108
109 // Verify internal state.
110 CHECK_EQ(Capacity(), new_capacity);
111 CHECK_EQ(Size(), old_size);
112}
113
David Srbeckydd973932015-04-07 20:29:48 +0100114void DebugFrameOpCodeWriterForAssembler::ImplicitlyAdvancePC() {
Vladimir Marko10ef6942015-10-22 15:25:54 +0100115 uint32_t pc = dchecked_integral_cast<uint32_t>(assembler_->CodeSize());
116 if (delay_emitting_advance_pc_) {
117 uint32_t stream_pos = dchecked_integral_cast<uint32_t>(opcodes_.size());
118 delayed_advance_pcs_.push_back(DelayedAdvancePC {stream_pos, pc});
119 } else {
120 AdvancePC(pc);
121 }
David Srbeckydd973932015-04-07 20:29:48 +0100122}
Ian Rogers2c8f6532011-09-02 17:16:34 -0700123
Vladimir Marko93205e32016-04-13 11:59:46 +0100124std::unique_ptr<Assembler> Assembler::Create(
125 ArenaAllocator* arena,
126 InstructionSet instruction_set,
127 const InstructionSetFeatures* instruction_set_features) {
jeffhao7fbee072012-08-24 17:56:54 -0700128 switch (instruction_set) {
Alex Light50fa9932015-08-10 15:30:07 -0700129#ifdef ART_ENABLE_CODEGEN_arm
jeffhao7fbee072012-08-24 17:56:54 -0700130 case kArm:
Vladimir Marko93205e32016-04-13 11:59:46 +0100131 return std::unique_ptr<Assembler>(new (arena) arm::Arm32Assembler(arena));
jeffhao7fbee072012-08-24 17:56:54 -0700132 case kThumb2:
Vladimir Marko93205e32016-04-13 11:59:46 +0100133 return std::unique_ptr<Assembler>(new (arena) arm::Thumb2Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700134#endif
135#ifdef ART_ENABLE_CODEGEN_arm64
Serban Constantinescued8dd492014-02-11 14:15:10 +0000136 case kArm64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100137 return std::unique_ptr<Assembler>(new (arena) arm64::Arm64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700138#endif
139#ifdef ART_ENABLE_CODEGEN_mips
jeffhao7fbee072012-08-24 17:56:54 -0700140 case kMips:
Vladimir Marko93205e32016-04-13 11:59:46 +0100141 return std::unique_ptr<Assembler>(new (arena) mips::MipsAssembler(
142 arena,
143 instruction_set_features != nullptr
144 ? instruction_set_features->AsMipsInstructionSetFeatures()
145 : nullptr));
Alex Light50fa9932015-08-10 15:30:07 -0700146#endif
147#ifdef ART_ENABLE_CODEGEN_mips64
Andreas Gampe57b34292015-01-14 15:45:59 -0800148 case kMips64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100149 return std::unique_ptr<Assembler>(new (arena) mips64::Mips64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700150#endif
151#ifdef ART_ENABLE_CODEGEN_x86
Dmitry Petrochenkofca82202014-03-21 11:21:37 +0700152 case kX86:
Vladimir Marko93205e32016-04-13 11:59:46 +0100153 return std::unique_ptr<Assembler>(new (arena) x86::X86Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700154#endif
155#ifdef ART_ENABLE_CODEGEN_x86_64
Dmitry Petrochenkofca82202014-03-21 11:21:37 +0700156 case kX86_64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100157 return std::unique_ptr<Assembler>(new (arena) x86_64::X86_64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700158#endif
jeffhao7fbee072012-08-24 17:56:54 -0700159 default:
160 LOG(FATAL) << "Unknown InstructionSet: " << instruction_set;
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700161 return nullptr;
Ian Rogers2c8f6532011-09-02 17:16:34 -0700162 }
163}
164
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700165void Assembler::StoreImmediateToThread32(ThreadOffset<4> dest ATTRIBUTE_UNUSED,
166 uint32_t imm ATTRIBUTE_UNUSED,
167 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700168 UNIMPLEMENTED(FATAL);
169}
170
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700171void Assembler::StoreImmediateToThread64(ThreadOffset<8> dest ATTRIBUTE_UNUSED,
172 uint32_t imm ATTRIBUTE_UNUSED,
173 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700174 UNIMPLEMENTED(FATAL);
175}
176
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700177void Assembler::StoreStackOffsetToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
178 FrameOffset fr_offs ATTRIBUTE_UNUSED,
179 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700180 UNIMPLEMENTED(FATAL);
181}
182
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700183void Assembler::StoreStackOffsetToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
184 FrameOffset fr_offs ATTRIBUTE_UNUSED,
185 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700186 UNIMPLEMENTED(FATAL);
187}
188
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700189void Assembler::StoreStackPointerToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700190 UNIMPLEMENTED(FATAL);
191}
192
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700193void Assembler::StoreStackPointerToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700194 UNIMPLEMENTED(FATAL);
195}
196
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700197void Assembler::LoadFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
198 ThreadOffset<4> src ATTRIBUTE_UNUSED,
199 size_t size ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700200 UNIMPLEMENTED(FATAL);
201}
202
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700203void Assembler::LoadFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
204 ThreadOffset<8> src ATTRIBUTE_UNUSED,
205 size_t size ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700206 UNIMPLEMENTED(FATAL);
207}
208
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700209void Assembler::LoadRawPtrFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
210 ThreadOffset<4> offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700211 UNIMPLEMENTED(FATAL);
212}
213
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700214void Assembler::LoadRawPtrFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
215 ThreadOffset<8> offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700216 UNIMPLEMENTED(FATAL);
217}
218
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700219void Assembler::CopyRawPtrFromThread32(FrameOffset fr_offs ATTRIBUTE_UNUSED,
220 ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
221 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700222 UNIMPLEMENTED(FATAL);
223}
224
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700225void Assembler::CopyRawPtrFromThread64(FrameOffset fr_offs ATTRIBUTE_UNUSED,
226 ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
227 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700228 UNIMPLEMENTED(FATAL);
229}
230
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700231void Assembler::CopyRawPtrToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
232 FrameOffset fr_offs ATTRIBUTE_UNUSED,
233 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700234 UNIMPLEMENTED(FATAL);
235}
236
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700237void Assembler::CopyRawPtrToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
238 FrameOffset fr_offs ATTRIBUTE_UNUSED,
239 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700240 UNIMPLEMENTED(FATAL);
241}
242
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700243void Assembler::CallFromThread32(ThreadOffset<4> offset ATTRIBUTE_UNUSED,
244 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700245 UNIMPLEMENTED(FATAL);
246}
247
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700248void Assembler::CallFromThread64(ThreadOffset<8> offset ATTRIBUTE_UNUSED,
249 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700250 UNIMPLEMENTED(FATAL);
251}
252
Carl Shapiro6b6b5f02011-06-21 15:05:09 -0700253} // namespace art