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buzbeee3acd072012-02-25 17:03:10 -08001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Ian Rogers57b86d42012-03-27 16:05:41 -070017#include "oat/runtime/oat_support_entrypoints.h"
18
buzbeee3acd072012-02-25 17:03:10 -080019namespace art {
20
buzbee5de34942012-03-01 14:51:57 -080021bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest,
22 RegLocation rlSrc1, RegLocation rlSrc2)
buzbeee3acd072012-02-25 17:03:10 -080023{
24#ifdef __mips_hard_float
Bill Buzbeea114add2012-05-03 15:00:40 -070025 int op = kMipsNop;
26 RegLocation rlResult;
buzbeee3acd072012-02-25 17:03:10 -080027
Bill Buzbeea114add2012-05-03 15:00:40 -070028 /*
29 * Don't attempt to optimize register usage since these opcodes call out to
30 * the handlers.
31 */
32 switch (mir->dalvikInsn.opcode) {
33 case Instruction::ADD_FLOAT_2ADDR:
34 case Instruction::ADD_FLOAT:
35 op = kMipsFadds;
36 break;
37 case Instruction::SUB_FLOAT_2ADDR:
38 case Instruction::SUB_FLOAT:
39 op = kMipsFsubs;
40 break;
41 case Instruction::DIV_FLOAT_2ADDR:
42 case Instruction::DIV_FLOAT:
43 op = kMipsFdivs;
44 break;
45 case Instruction::MUL_FLOAT_2ADDR:
46 case Instruction::MUL_FLOAT:
47 op = kMipsFmuls;
48 break;
49 case Instruction::REM_FLOAT_2ADDR:
50 case Instruction::REM_FLOAT:
51 case Instruction::NEG_FLOAT: {
52 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
buzbeee3acd072012-02-25 17:03:10 -080053 }
Bill Buzbeea114add2012-05-03 15:00:40 -070054 default:
55 return true;
56 }
57 rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
58 rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
59 rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
60 newLIR3(cUnit, (MipsOpCode)op, rlResult.lowReg, rlSrc1.lowReg,
61 rlSrc2.lowReg);
62 storeValue(cUnit, rlDest, rlResult);
buzbeee3acd072012-02-25 17:03:10 -080063
Bill Buzbeea114add2012-05-03 15:00:40 -070064 return false;
buzbeee3acd072012-02-25 17:03:10 -080065#else
Bill Buzbeea114add2012-05-03 15:00:40 -070066 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
buzbeee3acd072012-02-25 17:03:10 -080067#endif
68}
69
70static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
71 RegLocation rlDest, RegLocation rlSrc1,
72 RegLocation rlSrc2)
73{
74#ifdef __mips_hard_float
Bill Buzbeea114add2012-05-03 15:00:40 -070075 int op = kMipsNop;
76 RegLocation rlResult;
buzbeee3acd072012-02-25 17:03:10 -080077
Bill Buzbeea114add2012-05-03 15:00:40 -070078 switch (mir->dalvikInsn.opcode) {
79 case Instruction::ADD_DOUBLE_2ADDR:
80 case Instruction::ADD_DOUBLE:
81 op = kMipsFaddd;
82 break;
83 case Instruction::SUB_DOUBLE_2ADDR:
84 case Instruction::SUB_DOUBLE:
85 op = kMipsFsubd;
86 break;
87 case Instruction::DIV_DOUBLE_2ADDR:
88 case Instruction::DIV_DOUBLE:
89 op = kMipsFdivd;
90 break;
91 case Instruction::MUL_DOUBLE_2ADDR:
92 case Instruction::MUL_DOUBLE:
93 op = kMipsFmuld;
94 break;
95 case Instruction::REM_DOUBLE_2ADDR:
96 case Instruction::REM_DOUBLE:
97 case Instruction::NEG_DOUBLE: {
98 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
buzbeee3acd072012-02-25 17:03:10 -080099 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700100 default:
101 return true;
102 }
103 rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg);
104 DCHECK(rlSrc1.wide);
105 rlSrc2 = loadValueWide(cUnit, rlSrc2, kFPReg);
106 DCHECK(rlSrc2.wide);
107 rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
108 DCHECK(rlDest.wide);
109 DCHECK(rlResult.wide);
110 newLIR3(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg),
111 S2D(rlSrc1.lowReg, rlSrc1.highReg),
112 S2D(rlSrc2.lowReg, rlSrc2.highReg));
113 storeValueWide(cUnit, rlDest, rlResult);
114 return false;
buzbeee3acd072012-02-25 17:03:10 -0800115#else
Bill Buzbeea114add2012-05-03 15:00:40 -0700116 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
buzbeee3acd072012-02-25 17:03:10 -0800117#endif
118}
119
120static bool genConversion(CompilationUnit *cUnit, MIR *mir)
121{
buzbee5de34942012-03-01 14:51:57 -0800122#ifdef __mips_hard_float
Bill Buzbeea114add2012-05-03 15:00:40 -0700123 Instruction::Code opcode = mir->dalvikInsn.opcode;
124 bool longSrc = false;
125 bool longDest = false;
126 RegLocation rlSrc;
127 RegLocation rlDest;
128 int op = kMipsNop;
129 int srcReg;
130 RegLocation rlResult;
131 switch (opcode) {
132 case Instruction::INT_TO_FLOAT:
133 longSrc = false;
134 longDest = false;
135 op = kMipsFcvtsw;
136 break;
137 case Instruction::DOUBLE_TO_FLOAT:
138 longSrc = true;
139 longDest = false;
140 op = kMipsFcvtsd;
141 break;
142 case Instruction::FLOAT_TO_DOUBLE:
143 longSrc = false;
144 longDest = true;
145 op = kMipsFcvtds;
146 break;
147 case Instruction::INT_TO_DOUBLE:
148 longSrc = false;
149 longDest = true;
150 op = kMipsFcvtdw;
151 break;
152 case Instruction::FLOAT_TO_INT:
153 case Instruction::DOUBLE_TO_INT:
154 case Instruction::LONG_TO_DOUBLE:
155 case Instruction::FLOAT_TO_LONG:
156 case Instruction::LONG_TO_FLOAT:
157 case Instruction::DOUBLE_TO_LONG:
158 return genConversionPortable(cUnit, mir);
159 default:
160 return true;
161 }
162 if (longSrc) {
163 rlSrc = oatGetSrcWide(cUnit, mir, 0, 1);
164 rlSrc = loadValueWide(cUnit, rlSrc, kFPReg);
165 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg);
166 } else {
167 rlSrc = oatGetSrc(cUnit, mir, 0);
168 rlSrc = loadValue(cUnit, rlSrc, kFPReg);
169 srcReg = rlSrc.lowReg;
170 }
171 if (longDest) {
172 rlDest = oatGetDestWide(cUnit, mir, 0, 1);
173 rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
174 newLIR2(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg),
175 srcReg);
176 storeValueWide(cUnit, rlDest, rlResult);
177 } else {
178 rlDest = oatGetDest(cUnit, mir, 0);
179 rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
180 newLIR2(cUnit, (MipsOpCode)op, rlResult.lowReg, srcReg);
181 storeValue(cUnit, rlDest, rlResult);
182 }
183 return false;
buzbeee3acd072012-02-25 17:03:10 -0800184#else
Bill Buzbeea114add2012-05-03 15:00:40 -0700185 return genConversionPortable(cUnit, mir);
buzbeee3acd072012-02-25 17:03:10 -0800186#endif
187}
188
189static bool genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest,
190 RegLocation rlSrc1, RegLocation rlSrc2)
191{
Bill Buzbeea114add2012-05-03 15:00:40 -0700192 bool wide = true;
193 int offset;
buzbeee3acd072012-02-25 17:03:10 -0800194
Bill Buzbeea114add2012-05-03 15:00:40 -0700195 switch (mir->dalvikInsn.opcode) {
196 case Instruction::CMPL_FLOAT:
197 offset = ENTRYPOINT_OFFSET(pCmplFloat);
198 wide = false;
199 break;
200 case Instruction::CMPG_FLOAT:
201 offset = ENTRYPOINT_OFFSET(pCmpgFloat);
202 wide = false;
203 break;
204 case Instruction::CMPL_DOUBLE:
205 offset = ENTRYPOINT_OFFSET(pCmplDouble);
206 break;
207 case Instruction::CMPG_DOUBLE:
208 offset = ENTRYPOINT_OFFSET(pCmpgDouble);
209 break;
210 default:
211 return true;
212 }
213 oatFlushAllRegs(cUnit);
214 oatLockCallTemps(cUnit);
215 if (wide) {
216 loadValueDirectWideFixed(cUnit, rlSrc1, rARG0, rARG1);
217 loadValueDirectWideFixed(cUnit, rlSrc2, rARG2, rARG3);
218 } else {
219 loadValueDirectFixed(cUnit, rlSrc1, rARG0);
220 loadValueDirectFixed(cUnit, rlSrc2, rARG1);
221 }
222 int rTgt = loadHelper(cUnit, offset);
223 opReg(cUnit, kOpBlx, rTgt);
224 RegLocation rlResult = oatGetReturn(cUnit, false);
225 storeValue(cUnit, rlDest, rlResult);
226 return false;
buzbeee3acd072012-02-25 17:03:10 -0800227}
228
229} // namespace art