Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI__ASM_PTRACE_H |
| 20 | #define _UAPI__ASM_PTRACE_H |
| 21 | #include <linux/types.h> |
| 22 | #include <asm/hwcap.h> |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | #define PSR_MODE_EL0t 0x00000000 |
| 25 | #define PSR_MODE_EL1t 0x00000004 |
| 26 | #define PSR_MODE_EL1h 0x00000005 |
| 27 | #define PSR_MODE_EL2t 0x00000008 |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | #define PSR_MODE_EL2h 0x00000009 |
| 30 | #define PSR_MODE_EL3t 0x0000000c |
| 31 | #define PSR_MODE_EL3h 0x0000000d |
| 32 | #define PSR_MODE_MASK 0x0000000f |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #define PSR_MODE32_BIT 0x00000010 |
| 35 | #define PSR_F_BIT 0x00000040 |
| 36 | #define PSR_I_BIT 0x00000080 |
| 37 | #define PSR_A_BIT 0x00000100 |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #define PSR_D_BIT 0x00000200 |
| 40 | #define PSR_Q_BIT 0x08000000 |
| 41 | #define PSR_V_BIT 0x10000000 |
| 42 | #define PSR_C_BIT 0x20000000 |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | #define PSR_Z_BIT 0x40000000 |
| 45 | #define PSR_N_BIT 0x80000000 |
| 46 | #define PSR_f 0xff000000 |
| 47 | #define PSR_s 0x00ff0000 |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | #define PSR_x 0x0000ff00 |
| 50 | #define PSR_c 0x000000ff |
| 51 | #ifndef __ASSEMBLY__ |
| 52 | struct user_pt_regs { |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | __u64 regs[31]; |
| 55 | __u64 sp; |
| 56 | __u64 pc; |
| 57 | __u64 pstate; |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | }; |
| 60 | struct user_fpsimd_state { |
| 61 | __uint128_t vregs[32]; |
| 62 | __u32 fpsr; |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | __u32 fpcr; |
| 65 | }; |
| 66 | struct user_hwdebug_state { |
| 67 | __u32 dbg_info; |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | __u32 pad; |
| 70 | struct { |
| 71 | __u64 addr; |
| 72 | __u32 ctrl; |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | __u32 pad; |
| 75 | } dbg_regs[16]; |
| 76 | }; |
| 77 | #endif |
| 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 79 | #endif |