Gitiles
Code Review Sign In
review.blissroms.org / platform_bionic / 11829be3e1a9e9e2271ba64a78c327bde6e044eb / . / libc / kernel / uapi / linux / spi / spidev.h
blob: f233040fd43dd6ca1cf95a74444aec87591930db [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef SPIDEV_H
20#define SPIDEV_H
21#include <linux/types.h>
22#define SPI_CPHA 0x01
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define SPI_CPOL 0x02
25#define SPI_MODE_0 (0|0)
26#define SPI_MODE_1 (0|SPI_CPHA)
27#define SPI_MODE_2 (SPI_CPOL|0)
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
30#define SPI_CS_HIGH 0x04
31#define SPI_LSB_FIRST 0x08
32#define SPI_3WIRE 0x10
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define SPI_LOOP 0x20
35#define SPI_NO_CS 0x40
36#define SPI_READY 0x80
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]37#define SPI_TX_DUAL 0x100
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define SPI_TX_QUAD 0x200
40#define SPI_RX_DUAL 0x400
41#define SPI_RX_QUAD 0x800
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]42#define SPI_IOC_MAGIC 'k'
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44struct spi_ioc_transfer {
45 __u64 tx_buf;
46 __u64 rx_buf;
47 __u32 len;
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49 __u32 speed_hz;
50 __u16 delay_usecs;
51 __u8 bits_per_word;
52 __u8 cs_change;
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]54 __u8 tx_nbits;
55 __u8 rx_nbits;
56 __u16 pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]57};
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]59#define SPI_MSGSIZE(N) ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
60#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]61#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8)
62#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]64#define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, __u8)
65#define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, __u8)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]66#define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, __u8)
67#define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, __u8)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]69#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32)
70#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700[diff] [blame]71#define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, __u32)
72#define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, __u32)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#endif