blob: 99fc255f3fc9abe12e2e4144f84786ace912300a [file] [log] [blame]
Christopher Ferris5f45d582013-08-07 13:09:51 -07001/*
2 * Copyright (C) 2013 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29
30/*
31 * This code assumes it is running on a processor that supports all arm v7
32 * instructions, that supports neon instructions, and that has a 32 byte
33 * cache line.
34 */
35
36// Assumes neon instructions and a cache line size of 32 bytes.
37
Nick Kralevich32bbf8a2013-10-02 16:54:58 -070038ENTRY_PRIVATE(MEMCPY_BASE)
Christopher Ferrisa57c9c02013-08-21 09:41:12 -070039 .save {r0, lr}
40 .cfi_def_cfa_offset 8
41 .cfi_rel_offset r0, 0
42 .cfi_rel_offset lr, 4
43
Christopher Ferris5f45d582013-08-07 13:09:51 -070044 /* do we have at least 16-bytes to copy (needed for alignment below) */
45 cmp r2, #16
46 blo 5f
47
48 /* align destination to cache-line for the write-buffer */
49 rsb r3, r0, #0
50 ands r3, r3, #0xF
51 beq 2f
52
53 /* copy up to 15-bytes (count in r3) */
54 sub r2, r2, r3
55 movs ip, r3, lsl #31
56 itt mi
57 ldrbmi lr, [r1], #1
58 strbmi lr, [r0], #1
59 itttt cs
60 ldrbcs ip, [r1], #1
61 ldrbcs lr, [r1], #1
62 strbcs ip, [r0], #1
63 strbcs lr, [r0], #1
64 movs ip, r3, lsl #29
65 bge 1f
66 // copies 4 bytes, destination 32-bits aligned
67 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
68 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
691: bcc 2f
70 // copies 8 bytes, destination 64-bits aligned
71 vld1.8 {d0}, [r1]!
72 vst1.8 {d0}, [r0, :64]!
73
742: /* make sure we have at least 64 bytes to copy */
75 subs r2, r2, #64
76 blo 2f
77
781: /* The main loop copies 64 bytes at a time */
79 vld1.8 {d0 - d3}, [r1]!
80 vld1.8 {d4 - d7}, [r1]!
Christopher Ferrisc3c58fb2013-10-15 12:10:06 -070081 pld [r1, #(32*8)]
Christopher Ferris5f45d582013-08-07 13:09:51 -070082 subs r2, r2, #64
83 vst1.8 {d0 - d3}, [r0, :128]!
84 vst1.8 {d4 - d7}, [r0, :128]!
85 bhs 1b
86
872: /* fix-up the remaining count and make sure we have >= 32 bytes left */
88 adds r2, r2, #32
89 blo 4f
90
91 /* Copy 32 bytes. These cache lines were already preloaded */
92 vld1.8 {d0 - d3}, [r1]!
93 sub r2, r2, #32
94 vst1.8 {d0 - d3}, [r0, :128]!
95
964: /* less than 32 left */
97 add r2, r2, #32
98 tst r2, #0x10
99 beq 5f
100 // copies 16 bytes, 128-bits aligned
101 vld1.8 {d0, d1}, [r1]!
102 vst1.8 {d0, d1}, [r0, :128]!
103
1045: /* copy up to 15-bytes (count in r2) */
105 movs ip, r2, lsl #29
106 bcc 1f
107 vld1.8 {d0}, [r1]!
108 vst1.8 {d0}, [r0]!
1091: bge 2f
110 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
111 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]!
1122: movs ip, r2, lsl #31
113 itt mi
114 ldrbmi r3, [r1], #1
115 strbmi r3, [r0], #1
116 itttt cs
117 ldrbcs ip, [r1], #1
118 ldrbcs lr, [r1], #1
119 strbcs ip, [r0], #1
120 strbcs lr, [r0], #1
121
122 ldmfd sp!, {r0, lr}
123 bx lr
Christopher Ferrisa57c9c02013-08-21 09:41:12 -0700124END(MEMCPY_BASE)