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review.blissroms.org / platform_bionic / 26c2bb84dd5cbd9ab43a5f0ebc2635bc3b64be3d / . / libc / kernel / uapi / asm-arm / asm / ptrace.h
blob: 78191ac88305e90f08f73a8cbbe332b1eeed4985 [file] [log] [blame]
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI__ASM_ARM_PTRACE_H
20#define _UAPI__ASM_ARM_PTRACE_H
21#include <asm/hwcap.h>
22#define PTRACE_GETREGS 12
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define PTRACE_SETREGS 13
25#define PTRACE_GETFPREGS 14
26#define PTRACE_SETFPREGS 15
27#define PTRACE_GETWMMXREGS 18
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define PTRACE_SETWMMXREGS 19
30#define PTRACE_OLDSETOPTIONS 21
31#define PTRACE_GET_THREAD_AREA 22
32#define PTRACE_SET_SYSCALL 23
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define PTRACE_GETCRUNCHREGS 25
35#define PTRACE_SETCRUNCHREGS 26
36#define PTRACE_GETVFPREGS 27
37#define PTRACE_SETVFPREGS 28
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define PTRACE_GETHBPREGS 29
40#define PTRACE_SETHBPREGS 30
41#define USR26_MODE 0x00000000
42#define FIQ26_MODE 0x00000001
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define IRQ26_MODE 0x00000002
45#define SVC26_MODE 0x00000003
46#define USR_MODE 0x00000010
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]47#define FIQ_MODE 0x00000011
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]49#define IRQ_MODE 0x00000012
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]50#define SVC_MODE 0x00000013
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]51#define ABT_MODE 0x00000017
52#define HYP_MODE 0x0000001a
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define UND_MODE 0x0000001b
55#define SYSTEM_MODE 0x0000001f
56#define MODE32_BIT 0x00000010
57#define MODE_MASK 0x0000001f
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]59#define PSR_T_BIT 0x00000020
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]60#define PSR_F_BIT 0x00000040
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]61#define PSR_I_BIT 0x00000080
62#define PSR_A_BIT 0x00000100
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]64#define PSR_E_BIT 0x00000200
65#define PSR_J_BIT 0x01000000
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]66#define PSR_Q_BIT 0x08000000
67#define PSR_V_BIT 0x10000000
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]69#define PSR_C_BIT 0x20000000
70#define PSR_Z_BIT 0x40000000
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]71#define PSR_N_BIT 0x80000000
72#define PSR_f 0xff000000
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]74#define PSR_s 0x00ff0000
75#define PSR_x 0x0000ff00
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]76#define PSR_c 0x000000ff
77#define APSR_MASK 0xf80f0000
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]79#define PSR_ISET_MASK 0x01000010
80#define PSR_IT_MASK 0x0600fc00
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]81#define PSR_ENDIAN_MASK 0x00000200
82#define PSR_ENDSTATE 0
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]84#define PT_TEXT_ADDR 0x10000
85#define PT_DATA_ADDR 0x10004
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]86#define PT_TEXT_END_ADDR 0x10008
87#ifndef __ASSEMBLY__
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]89struct pt_regs {
90 long uregs[18];
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]91};
92#define ARM_cpsr uregs[16]
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]94#define ARM_pc uregs[15]
95#define ARM_lr uregs[14]
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]96#define ARM_sp uregs[13]
97#define ARM_ip uregs[12]
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]99#define ARM_fp uregs[11]
100#define ARM_r10 uregs[10]
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]101#define ARM_r9 uregs[9]
102#define ARM_r8 uregs[8]
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]104#define ARM_r7 uregs[7]
105#define ARM_r6 uregs[6]
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]106#define ARM_r5 uregs[5]
107#define ARM_r4 uregs[4]
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]109#define ARM_r3 uregs[3]
110#define ARM_r2 uregs[2]
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]111#define ARM_r1 uregs[1]
112#define ARM_r0 uregs[0]
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]114#define ARM_ORIG_r0 uregs[17]
115#define ARM_VFPREGS_SIZE ( 32 * 8 + 4 )
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800[diff] [blame]116#endif
117#endif
Ben Chenga6b53f02013-11-06 15:51:05 -0800[diff] [blame]118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */