| Raghu Gandham | 82fa43f | 2012-03-27 11:37:17 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef __ASM_CPU_INFO_H |
| 20 | #define __ASM_CPU_INFO_H |
| 21 | #include <asm/cache.h> |
| 22 | struct cache_desc { |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | unsigned int waysize; |
| 25 | unsigned short sets; |
| 26 | unsigned char ways; |
| 27 | unsigned char linesz; |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | unsigned char waybit; |
| 30 | unsigned char flags; |
| 31 | }; |
| 32 | #define MIPS_CACHE_NOT_PRESENT 0x00000001 |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #define MIPS_CACHE_VTAG 0x00000002 |
| 35 | #define MIPS_CACHE_ALIASES 0x00000004 |
| 36 | #define MIPS_CACHE_IC_F_DC 0x00000008 |
| 37 | #define MIPS_IC_SNOOPS_REMOTE 0x00000010 |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #define MIPS_CACHE_PINDEX 0x00000020 |
| 40 | struct cpuinfo_mips { |
| 41 | unsigned long udelay_val; |
| 42 | unsigned long asid_cache; |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | unsigned long options; |
| 45 | unsigned long ases; |
| 46 | unsigned int processor_id; |
| 47 | unsigned int fpu_id; |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | unsigned int cputype; |
| 50 | int isa_level; |
| 51 | int tlbsize; |
| 52 | struct cache_desc icache; |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | struct cache_desc dcache; |
| 55 | struct cache_desc scache; |
| 56 | struct cache_desc tcache; |
| 57 | int srsets; |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | int core; |
| 60 | void *data; |
| 61 | } __attribute__((aligned(SMP_CACHE_BYTES))); |
| 62 | #define current_cpu_data cpu_data[smp_processor_id()] |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] |
| 65 | #define cpu_name_string() __cpu_name[smp_processor_id()] |
| 66 | #endif |