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review.blissroms.org / platform_bionic / 5edb0f40f654c804d38f1bff43f91719e189c892 / . / libc / kernel / uapi / drm / omap_drm.h
blob: efca002183abf482f736415326619fa3931a5c7e [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __OMAP_DRM_H__
20#define __OMAP_DRM_H__
21#include <drm/drm.h>
22#define OMAP_PARAM_CHIPSET_ID 1
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24struct drm_omap_param {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]25 uint64_t param;
26 uint64_t value;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]27};
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define OMAP_BO_SCANOUT 0x00000001
30#define OMAP_BO_CACHE_MASK 0x00000006
31#define OMAP_BO_TILED_MASK 0x00000f00
32#define OMAP_BO_CACHED 0x00000000
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define OMAP_BO_WC 0x00000002
35#define OMAP_BO_UNCACHED 0x00000004
36#define OMAP_BO_TILED_8 0x00000100
37#define OMAP_BO_TILED_16 0x00000200
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define OMAP_BO_TILED_32 0x00000300
40#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
41union omap_gem_size {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]42 uint32_t bytes;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]44 struct {
45 uint16_t width;
46 uint16_t height;
47 } tiled;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49};
50struct drm_omap_gem_new {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]51 union omap_gem_size size;
52 uint32_t flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]54 uint32_t handle;
55 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]56};
57enum omap_gem_op {
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]59 OMAP_GEM_READ = 0x01,
60 OMAP_GEM_WRITE = 0x02,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]61};
62struct drm_omap_gem_cpu_prep {
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]64 uint32_t handle;
65 uint32_t op;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]66};
67struct drm_omap_gem_cpu_fini {
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]69 uint32_t handle;
70 uint32_t op;
71 uint32_t nregions;
72 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74};
75struct drm_omap_gem_info {
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]76 uint32_t handle;
77 uint32_t pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]79 uint64_t offset;
80 uint32_t size;
81 uint32_t __pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]82};
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84#define DRM_OMAP_GET_PARAM 0x00
85#define DRM_OMAP_SET_PARAM 0x01
86#define DRM_OMAP_GEM_NEW 0x03
87#define DRM_OMAP_GEM_CPU_PREP 0x04
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define DRM_OMAP_GEM_CPU_FINI 0x05
90#define DRM_OMAP_GEM_INFO 0x06
91#define DRM_OMAP_NUM_IOCTLS 0x07
92#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]94#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]95#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]96#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
97#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
100#endif