Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame^] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _VIA_DRM_H_ |
| 20 | #define _VIA_DRM_H_ |
| 21 | #include <drm/drm.h> |
| 22 | #ifndef _VIA_DEFINES_ |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | #define _VIA_DEFINES_ |
| 25 | #include "via_drmclient.h" |
| 26 | #define VIA_NR_SAREA_CLIPRECTS 8 |
| 27 | #define VIA_NR_XVMC_PORTS 10 |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | #define VIA_NR_XVMC_LOCKS 5 |
| 30 | #define VIA_MAX_CACHELINE_SIZE 64 |
| 31 | #define XVMCLOCKPTR(saPriv,lockNo) ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + (VIA_MAX_CACHELINE_SIZE - 1)) & ~(VIA_MAX_CACHELINE_SIZE - 1)) + VIA_MAX_CACHELINE_SIZE*(lockNo))) |
| 32 | #define VIA_NR_TEX_REGIONS 64 |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #define VIA_LOG_MIN_TEX_REGION_SIZE 16 |
| 35 | #endif |
| 36 | #define VIA_UPLOAD_TEX0IMAGE 0x1 |
| 37 | #define VIA_UPLOAD_TEX1IMAGE 0x2 |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #define VIA_UPLOAD_CTX 0x4 |
| 40 | #define VIA_UPLOAD_BUFFERS 0x8 |
| 41 | #define VIA_UPLOAD_TEX0 0x10 |
| 42 | #define VIA_UPLOAD_TEX1 0x20 |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | #define VIA_UPLOAD_CLIPRECTS 0x40 |
| 45 | #define VIA_UPLOAD_ALL 0xff |
| 46 | #define DRM_VIA_ALLOCMEM 0x00 |
| 47 | #define DRM_VIA_FREEMEM 0x01 |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | #define DRM_VIA_AGP_INIT 0x02 |
| 50 | #define DRM_VIA_FB_INIT 0x03 |
| 51 | #define DRM_VIA_MAP_INIT 0x04 |
| 52 | #define DRM_VIA_DEC_FUTEX 0x05 |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | #define NOT_USED |
| 55 | #define DRM_VIA_DMA_INIT 0x07 |
| 56 | #define DRM_VIA_CMDBUFFER 0x08 |
| 57 | #define DRM_VIA_FLUSH 0x09 |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | #define DRM_VIA_PCICMD 0x0a |
| 60 | #define DRM_VIA_CMDBUF_SIZE 0x0b |
| 61 | #define NOT_USED |
| 62 | #define DRM_VIA_WAIT_IRQ 0x0d |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | #define DRM_VIA_DMA_BLIT 0x0e |
| 65 | #define DRM_VIA_BLIT_SYNC 0x0f |
| 66 | #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) |
| 67 | #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) |
| 70 | #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) |
| 71 | #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) |
| 72 | #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) |
| 75 | #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) |
| 76 | #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) |
| 77 | #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) |
| 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 79 | #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, drm_via_cmdbuf_size_t) |
| 80 | #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) |
| 81 | #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) |
| 82 | #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) |
| 83 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 84 | #define VIA_TEX_SETUP_SIZE 8 |
| 85 | #define VIA_FRONT 0x1 |
| 86 | #define VIA_BACK 0x2 |
| 87 | #define VIA_DEPTH 0x4 |
| 88 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 89 | #define VIA_STENCIL 0x8 |
| 90 | #define VIA_MEM_VIDEO 0 |
| 91 | #define VIA_MEM_AGP 1 |
| 92 | #define VIA_MEM_SYSTEM 2 |
| 93 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 94 | #define VIA_MEM_MIXED 3 |
| 95 | #define VIA_MEM_UNKNOWN 4 |
| 96 | typedef struct { |
| 97 | __u32 offset; |
| 98 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 99 | __u32 size; |
| 100 | } drm_via_agp_t; |
| 101 | typedef struct { |
| 102 | __u32 offset; |
| 103 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 104 | __u32 size; |
| 105 | } drm_via_fb_t; |
| 106 | typedef struct { |
| 107 | __u32 context; |
| 108 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 109 | __u32 type; |
| 110 | __u32 size; |
| 111 | unsigned long index; |
| 112 | unsigned long offset; |
| 113 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 114 | } drm_via_mem_t; |
| 115 | typedef struct _drm_via_init { |
| 116 | enum { |
| 117 | VIA_INIT_MAP = 0x01, |
| 118 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 119 | VIA_CLEANUP_MAP = 0x02 |
| 120 | } func; |
| 121 | unsigned long sarea_priv_offset; |
| 122 | unsigned long fb_offset; |
| 123 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 124 | unsigned long mmio_offset; |
| 125 | unsigned long agpAddr; |
| 126 | } drm_via_init_t; |
| 127 | typedef struct _drm_via_futex { |
| 128 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 129 | enum { |
| 130 | VIA_FUTEX_WAIT = 0x00, |
| 131 | VIA_FUTEX_WAKE = 0X01 |
| 132 | } func; |
| 133 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 134 | __u32 ms; |
| 135 | __u32 lock; |
| 136 | __u32 val; |
| 137 | } drm_via_futex_t; |
| 138 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 139 | typedef struct _drm_via_dma_init { |
| 140 | enum { |
| 141 | VIA_INIT_DMA = 0x01, |
| 142 | VIA_CLEANUP_DMA = 0x02, |
| 143 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 144 | VIA_DMA_INITIALIZED = 0x03 |
| 145 | } func; |
| 146 | unsigned long offset; |
| 147 | unsigned long size; |
| 148 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 149 | unsigned long reg_pause_addr; |
| 150 | } drm_via_dma_init_t; |
| 151 | typedef struct _drm_via_cmdbuffer { |
| 152 | char __user *buf; |
| 153 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 154 | unsigned long size; |
| 155 | } drm_via_cmdbuffer_t; |
| 156 | typedef struct _drm_via_tex_region { |
| 157 | unsigned char next, prev; |
| 158 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 159 | unsigned char inUse; |
| 160 | int age; |
| 161 | } drm_via_tex_region_t; |
| 162 | typedef struct _drm_via_sarea { |
| 163 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 164 | unsigned int dirty; |
| 165 | unsigned int nbox; |
| 166 | struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; |
| 167 | drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; |
| 168 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 169 | int texAge; |
| 170 | int ctxOwner; |
| 171 | int vertexPrim; |
| 172 | char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; |
| 173 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 174 | unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; |
| 175 | unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; |
| 176 | unsigned int XvMCCtxNoGrabbed; |
| 177 | unsigned int pfCurrentOffset; |
| 178 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 179 | } drm_via_sarea_t; |
| 180 | typedef struct _drm_via_cmdbuf_size { |
| 181 | enum { |
| 182 | VIA_CMDBUF_SPACE = 0x01, |
| 183 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 184 | VIA_CMDBUF_LAG = 0x02 |
| 185 | } func; |
| 186 | int wait; |
| 187 | __u32 size; |
| 188 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 189 | } drm_via_cmdbuf_size_t; |
| 190 | typedef enum { |
| 191 | VIA_IRQ_ABSOLUTE = 0x0, |
| 192 | VIA_IRQ_RELATIVE = 0x1, |
| 193 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 194 | VIA_IRQ_SIGNAL = 0x10000000, |
| 195 | VIA_IRQ_FORCE_SEQUENCE = 0x20000000 |
| 196 | } via_irq_seq_type_t; |
| 197 | #define VIA_IRQ_FLAGS_MASK 0xF0000000 |
| 198 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 199 | enum drm_via_irqs { |
| 200 | drm_via_irq_hqv0 = 0, |
| 201 | drm_via_irq_hqv1, |
| 202 | drm_via_irq_dma0_dd, |
| 203 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 204 | drm_via_irq_dma0_td, |
| 205 | drm_via_irq_dma1_dd, |
| 206 | drm_via_irq_dma1_td, |
| 207 | drm_via_irq_num |
| 208 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 209 | }; |
| 210 | struct drm_via_wait_irq_request { |
| 211 | unsigned irq; |
| 212 | via_irq_seq_type_t type; |
| 213 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 214 | __u32 sequence; |
| 215 | __u32 signal; |
| 216 | }; |
| 217 | typedef union drm_via_irqwait { |
| 218 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 219 | struct drm_via_wait_irq_request request; |
| 220 | struct drm_wait_vblank_reply reply; |
| 221 | } drm_via_irqwait_t; |
| 222 | typedef struct drm_via_blitsync { |
| 223 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 224 | __u32 sync_handle; |
| 225 | unsigned engine; |
| 226 | } drm_via_blitsync_t; |
| 227 | typedef struct drm_via_dmablit { |
| 228 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 229 | __u32 num_lines; |
| 230 | __u32 line_length; |
| 231 | __u32 fb_addr; |
| 232 | __u32 fb_stride; |
| 233 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 234 | unsigned char *mem_addr; |
| 235 | __u32 mem_stride; |
| 236 | __u32 flags; |
| 237 | int to_fb; |
| 238 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 239 | drm_via_blitsync_t sync; |
| 240 | } drm_via_dmablit_t; |
| 241 | struct via_file_private { |
| 242 | struct list_head obj_list; |
| 243 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 244 | }; |
| 245 | #endif |