blob: a11fc1cfda93723cfd0ed675bdafb0811b28110c [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __VMWGFX_DRM_H__
20#define __VMWGFX_DRM_H__
21#define DRM_VMW_MAX_SURFACE_FACES 6
22#define DRM_VMW_MAX_MIP_LEVELS 24
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define DRM_VMW_GET_PARAM 0
25#define DRM_VMW_ALLOC_DMABUF 1
26#define DRM_VMW_UNREF_DMABUF 2
27#define DRM_VMW_CURSOR_BYPASS 3
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define DRM_VMW_CONTROL_STREAM 4
30#define DRM_VMW_CLAIM_STREAM 5
31#define DRM_VMW_UNREF_STREAM 6
32#define DRM_VMW_CREATE_CONTEXT 7
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define DRM_VMW_UNREF_CONTEXT 8
35#define DRM_VMW_CREATE_SURFACE 9
36#define DRM_VMW_UNREF_SURFACE 10
37#define DRM_VMW_REF_SURFACE 11
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define DRM_VMW_EXECBUF 12
40#define DRM_VMW_GET_3D_CAP 13
41#define DRM_VMW_FENCE_WAIT 14
42#define DRM_VMW_FENCE_SIGNALED 15
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define DRM_VMW_FENCE_UNREF 16
45#define DRM_VMW_FENCE_EVENT 17
46#define DRM_VMW_PRESENT 18
47#define DRM_VMW_PRESENT_READBACK 19
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define DRM_VMW_UPDATE_LAYOUT 20
50#define DRM_VMW_PARAM_NUM_STREAMS 0
51#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
52#define DRM_VMW_PARAM_3D 2
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define DRM_VMW_PARAM_HW_CAPS 3
55#define DRM_VMW_PARAM_FIFO_CAPS 4
56#define DRM_VMW_PARAM_MAX_FB_SIZE 5
57#define DRM_VMW_PARAM_FIFO_HW_VERSION 6
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59struct drm_vmw_getparam_arg {
60 uint64_t value;
61 uint32_t param;
62 uint32_t pad64;
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64};
65struct drm_vmw_context_arg {
66 int32_t cid;
67 uint32_t pad64;
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69};
70struct drm_vmw_surface_create_req {
71 uint32_t flags;
72 uint32_t format;
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
75 uint64_t size_addr;
76 int32_t shareable;
77 int32_t scanout;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79};
80struct drm_vmw_surface_arg {
81 int32_t sid;
82 uint32_t pad64;
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84};
85struct drm_vmw_size {
86 uint32_t width;
87 uint32_t height;
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89 uint32_t depth;
90 uint32_t pad64;
91};
92union drm_vmw_surface_create_arg {
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94 struct drm_vmw_surface_arg rep;
95 struct drm_vmw_surface_create_req req;
96};
97union drm_vmw_surface_reference_arg {
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99 struct drm_vmw_surface_create_req rep;
100 struct drm_vmw_surface_arg req;
101};
102#define DRM_VMW_EXECBUF_VERSION 1
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104struct drm_vmw_execbuf_arg {
105 uint64_t commands;
106 uint32_t command_size;
107 uint32_t throttle_us;
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109 uint64_t fence_rep;
110 uint32_t version;
111 uint32_t flags;
112};
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114struct drm_vmw_fence_rep {
115 uint32_t handle;
116 uint32_t mask;
117 uint32_t seqno;
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119 uint32_t passed_seqno;
120 uint32_t pad64;
121 int32_t error;
122};
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124struct drm_vmw_alloc_dmabuf_req {
125 uint32_t size;
126 uint32_t pad64;
127};
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129struct drm_vmw_dmabuf_rep {
130 uint64_t map_handle;
131 uint32_t handle;
132 uint32_t cur_gmr_id;
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 uint32_t cur_gmr_offset;
135 uint32_t pad64;
136};
137union drm_vmw_alloc_dmabuf_arg {
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 struct drm_vmw_alloc_dmabuf_req req;
140 struct drm_vmw_dmabuf_rep rep;
141};
142struct drm_vmw_unref_dmabuf_arg {
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 uint32_t handle;
145 uint32_t pad64;
146};
147struct drm_vmw_rect {
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 int32_t x;
150 int32_t y;
151 uint32_t w;
152 uint32_t h;
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154};
155struct drm_vmw_control_stream_arg {
156 uint32_t stream_id;
157 uint32_t enabled;
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159 uint32_t flags;
160 uint32_t color_key;
161 uint32_t handle;
162 uint32_t offset;
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164 int32_t format;
165 uint32_t size;
166 uint32_t width;
167 uint32_t height;
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 uint32_t pitch[3];
170 uint32_t pad64;
171 struct drm_vmw_rect src;
172 struct drm_vmw_rect dst;
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174};
175#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
176#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
177struct drm_vmw_cursor_bypass_arg {
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 uint32_t flags;
180 uint32_t crtc_id;
181 int32_t xpos;
182 int32_t ypos;
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 int32_t xhot;
185 int32_t yhot;
186};
187struct drm_vmw_stream_arg {
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 uint32_t stream_id;
190 uint32_t pad64;
191};
192struct drm_vmw_get_3d_cap_arg {
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194 uint64_t buffer;
195 uint32_t max_size;
196 uint32_t pad64;
197};
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
200#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
201#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
202struct drm_vmw_fence_wait_arg {
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204 uint32_t handle;
205 int32_t cookie_valid;
206 uint64_t kernel_cookie;
207 uint64_t timeout_us;
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209 int32_t lazy;
210 int32_t flags;
211 int32_t wait_options;
212 int32_t pad64;
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214};
215struct drm_vmw_fence_signaled_arg {
216 uint32_t handle;
217 uint32_t flags;
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219 int32_t signaled;
220 uint32_t passed_seqno;
221 uint32_t signaled_flags;
222 uint32_t pad64;
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224};
225struct drm_vmw_fence_arg {
226 uint32_t handle;
227 uint32_t pad64;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229};
230#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
231struct drm_vmw_event_fence {
232 struct drm_event base;
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 uint64_t user_data;
235 uint32_t tv_sec;
236 uint32_t tv_usec;
237};
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
240struct drm_vmw_fence_event_arg {
241 uint64_t fence_rep;
242 uint64_t user_data;
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244 uint32_t handle;
245 uint32_t flags;
246};
247struct drm_vmw_present_arg {
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249 uint32_t fb_id;
250 uint32_t sid;
251 int32_t dest_x;
252 int32_t dest_y;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 uint64_t clips_ptr;
255 uint32_t num_clips;
256 uint32_t pad64;
257};
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259struct drm_vmw_present_readback_arg {
260 uint32_t fb_id;
261 uint32_t num_clips;
262 uint64_t clips_ptr;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 uint64_t fence_rep;
265};
266struct drm_vmw_update_layout_arg {
267 uint32_t num_outputs;
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269 uint32_t pad64;
270 uint64_t rects;
271};
272#endif
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */